Commit graph

216865 commits

Author SHA1 Message Date
Alyssa Rosenzweig
4e59199cbb nir: add nir_is_shared_access helper
This is helpful to identify shared mem access for writing more generic code
operating on nir intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39219>
2026-01-09 20:51:12 +00:00
Caio Oliveira
d160b7726a brw/scoreboard: Disable nomask workaround for Xe2+
Some checks are pending
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The issue was caused by fused EU feature that is not used in Xe2+
anymore.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36659>
2026-01-09 17:25:00 +00:00
Caio Oliveira
47a6ef3fef brw/scoreboard: Use a predicate helper for the nomask workaround
If it wasn't for the workaround, it wouldn't be necessary to track the
whether instructions are exec_all or not.  The workaround affects
results when mixing a dep and inst with different exec_all.

Add the predicate so that, when the workaround is disabled, none of
the effects of having different exec_all will kick in, all them will
be considered `exec_all = true`.

This patch don't change any behavior, just adds the predicate.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36659>
2026-01-09 17:25:00 +00:00
Mel Henning
6fc211335a nouveau/drm-shim: Implement new getparam values
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39217>
2026-01-09 16:41:23 +00:00
Valentine Burley
78ebe5e858 lavapipe/ci: Move android-angle-lavapipe-cts job to nightly
The Android CTS job now takes about 25 minutes with Android 16, which is
too long for a pre-merge job.
The deqp-runner-powered `android-angle-lavapipe` job remains in the Marge
pipeline.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:02 +00:00
Valentine Burley
8c5cf0c720 Revert "ci/android: add sudo to EPHEMERAL deps for debian/x86_64_test-android.sh"
This is no longer necessary because we're not building Cuttlefish in the
container anymore.

This reverts commit 92488c4598.

Fixes: 0e80e831f8 ("ci/android: Use prebuilt cuttlefish packages from ci-deb-repo")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:02 +00:00
Valentine Burley
195ba837e2 ci/android: Quieten extracting Mesa artifacts
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:02 +00:00
Valentine Burley
5e27c8c112 ci/android: Reduce Cuttlefish log verbosity
Switch Cuttlefish console output to INFO to keep GitLab job logs readable.

Detailed logs are still preserved in the job artifacts via
`-file_verbosity=VERBOSE`.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:02 +00:00
Valentine Burley
a8a8e9be14 ci/android: Remove custom kernel
The 'venus_guest_angle' mode now uses the cross-domain context type and
no longer requires a custom kernel.

The 'venus' mode also works with the stock Android 16 kernel.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:00 +00:00
Valentine Burley
8cd82ce149 ci/android: Update to Android 16
Update the Cuttlefish image to Android 16, move to the r29 NDK, and build
Mesa with SDK version 35, the latest version currently supported.

The new Cuttlefish build switches the 'venus_guest_angle' mode to use the
`venus:cross-domain` context type instead of `virgl:virgl2:venus`, which
now works on Android 16. This mode also moves to the `skiavk` Vulkan
backend for HWUI and SurfaceFlinger.

The Cuttlefish repositories have also been moved to the new
https://gitlab.freedesktop.org/gfx-ci/android namespace.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:35:00 +00:00
Antonio Ospite
732208839f meson/android: bump platform-sdk-version to Android 15
According to https://apilevels.com/ targetSdk must be 35+ for new apps
and app updates as of August 31, 2025.

So let mesa also follow that recommendation.

This only affects the default value for cases when platform-sdk-version
has not been specified explicitly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39197>
2026-01-09 15:34:59 +00:00
Lionel Landwerlin
faa857a061 intel: rework push constant handling
Some checks are pending
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nr_params & params array are gone.

brw_ubo_range is not stored on the prog_data structure anymore (Anv
already stored a copy of that with its own additional information)

The backend now only deals with load_push_data_intel. load_uniform &
load_push_constant have to be lowered by the driver.

Pre Gfx12.5 platforms have to provide a subgroup_id_param to specify
where the subgroup_id value is located in the push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:52 +00:00
Lionel Landwerlin
60e359412d iris: manage TBIMR null push constant wa in driver
Anv already manages this itself. This allows removing the logic from
the compiler.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:52 +00:00
Lionel Landwerlin
f4a0e05970 anv/brw/iris: get rid of param array on prog_data
Drivers can do all the lowering to push constants to find the only
value useful in that array (subgroup_id). Then drivers call into
brw_cs_fill_push_const_info() to get the cross/per thread constant
layout computed in the prog_data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:51 +00:00
Lionel Landwerlin
05c3d427ba anv: ensure internal compute kernels are run at SIMD16
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:50 +00:00
Lionel Landwerlin
3dc7d71909 anv: stop going through push ranges on the first empty slot
The way we build our ranges, the first empty one is the end of the
ranges.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:50 +00:00
Lionel Landwerlin
ec456e99f2 brw: add a pass to lower ubo to push constant data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:49 +00:00
Lionel Landwerlin
2c7254c131 brw: invert condition to reduce code nesting
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:48 +00:00
Lionel Landwerlin
26e4632f64 nir: add a new push_data_intel intrinsic
We're finally moving on from misusing various intrinsics :
  - load_uniform
  - load_push_constant
  - load_ubo*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:46 +00:00
Lionel Landwerlin
799258fdde nir: use load() helper for inline_data_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:45 +00:00
Lionel Landwerlin
c84760a185 nir: add missing divergence handling for ray_query_global_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38975>
2026-01-09 14:19:45 +00:00
Benjamin Cheng
499d9e2e98 radv/video: Allow aliasing of video images
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39109>
2026-01-09 13:52:56 +00:00
Benjamin Cheng
d02ba9bb9c radeonsi/vcn: Allocate DPBs aligned to rec_alignment
Some checks are pending
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Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14618
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39221>
2026-01-09 12:46:52 +00:00
Benjamin Cheng
081f580fbf radeonsi/vcn: Factor out rec_alignment
Cc: mesa-stable
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39221>
2026-01-09 12:46:52 +00:00
Georg Lehmann
6d07a56c6a ac/nir/lower_ps_late: preserve signed zero, inf, nan for exports
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39187>
2026-01-09 11:58:52 +00:00
Georg Lehmann
84ecac58a6 ac/nir/opt_pack_half: preserve fp_math_ctrl
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39187>
2026-01-09 11:58:52 +00:00
Georg Lehmann
5241343ccb ac/nir/lower_sin_cos: preserve fp_math_ctrl
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39187>
2026-01-09 11:58:52 +00:00
Georg Lehmann
9331726157 ac/nir/lower_sin_cos: use nir_shader_alu_pass
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39187>
2026-01-09 11:58:52 +00:00
Samuel Pitoiset
4fa20bacac radv/ci: document a regression with transfer queue on RENOIR
Some checks are pending
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Weird that only RENOIR fails given that ASTC/ETC2 aren't natively
supported too.

Needs to be investigated but SDMA supports these formats to some
extent it seems.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39230>
2026-01-09 10:47:31 +00:00
Ella Stanforth
0f0938ed2e pvr: Convert format table to indexing with pipe_format
This simplifies adding extension formats later down the line.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39214>
2026-01-09 10:08:06 +00:00
Daivik Bhatia
0b4398134c v3dv: centralize limit macros in v3dv_limits.h
Move limit/max macros from v3dv_private.h and v3dv_uniforms.c
to v3dv_limits.h

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38732>
2026-01-09 09:42:29 +00:00
Daivik Bhatia
e9c3d42ad5 v3dv: replace raw integers with enum types in helper functions.
Update function return types, parameters, and struct fields to use
enums instead of uint8_t or uint32_t.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38732>
2026-01-09 09:42:29 +00:00
Daivik Bhatia
b06aa98246 v3dv: move format helpers to new v3dv format table header files.
Move tfu_supports_tex_format() and
get_internal_type_bpp_for_output_format() from v3dvx_private.h
to v3dvx_format_table.h.
Move v3dv_format_plane and v3dv_format struct from v3dv_private.h
to v3dv_format_table.h.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38732>
2026-01-09 09:42:29 +00:00
Samuel Pitoiset
edb730f647 radv: fix flushing gang semaphore with SDMA/ACE
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If the main CS is SDMA and the gang CS is ACE, this would emit a
SDMA_FENCE packet on ACE which just hangs.

Fixes: b1938901d0 ("radv: Use SDMA fence packet when flushing gang semaphores")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39211>
2026-01-09 09:07:45 +00:00
Zan Dobersek
813451893e freedreno/registers: add a custom build target for adreno_pm4.xml.gz
Add a custom build target to generate and install the compressed
adreno_pm4.xml file, needed by rnn that's utilized through different tools.
This used to be generated in the generic loop of XML files, but was then
left out after adreno_pm4.xml handling was special-cased.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 950f07748a ("meson: Use adreno-pm4-pack.xml.h instead of custom definitions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39213>
2026-01-09 08:18:49 +00:00
Georg Lehmann
93d05cdfd8 nir/opt_algebraic: move fsat last for fsqrt(fsat(a))
This should be exact, even for all special values:

fsqrt(NaN) -> NaN
fsqrt(-0.0) -> 0.0
fsqrt(-Inf) -> NaN
fsqrt(negative finite) -> NaN

So all of these get saturated to +0.0

All numbers >= 1.0 will have a square root >= 1.0,
which will be saturate to 1.0

Moving the fsat guarantees that it can use an output modifier
for hardware that has those, and shouldn't harm other hardware either.

Foz-DB Navi21:
Totals from 255 (0.31% of 82151) affected shaders:
Instrs: 664906 -> 664194 (-0.11%)
CodeSize: 3623500 -> 3619188 (-0.12%)
Latency: 11336397 -> 11335688 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 2716430 -> 2715726 (-0.03%); split: -0.03%, +0.00%
VALU: 442603 -> 441891 (-0.16%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39202>
2026-01-09 07:34:46 +00:00
Peyton Lee
6bd5c037f2 radeonsi/vpe: correct format setting
Some checks are pending
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The format parameters should come from the buffer itself,
not be taken from the process_properties,
because the buffer used for geometric scaling does not
originate from an externally provided buffer.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38948>
2026-01-09 06:08:22 +00:00
Caio Oliveira
dcefa0e6b3 brw: Rework UIP and JIP setting code
Some checks are pending
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The current code walks the instructions, and when needed,
it will scan to find the next "end of scope" and sometimes
the next "end of block".  It also has a separate patching
logic for HALTs.

The new code collects the necessary scope information up front,
then walks the instruction backwards, making avoiding the need
to scan for the end of scope.  It will also walk only the
relevant instructions that were previously collected.  It also
replaces the previous HALT-specific patching logic.

With this new change, many cases that were jumping to
intermediate HALTs, will now jump straight to the end of
scope (or the "end of the program" section).  E.g. in

```
   if
      ...
      (...) HALT
      ...
      (...) HALT
   endif
```

both HALTs now will jump to the end of the scope, instead of the
first HALT jumping into the second one.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38914>
2026-01-08 22:01:45 +00:00
Ian Romanick
aba079b3af nir/algebraic: Detect missing f on F-strings
Missing f in other cases seems to be caught either elsewhere in the
script or by the C compiler.

Fixes: c49d6e0480 ("nir/algebraic: Elide range clamping of f2u sources")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39031>
2026-01-08 13:20:48 -08:00
Ian Romanick
d4a87e85b3 nir/algebraic: Add missing f on F-strings
Without this, nir_algebraic.py was treating "f2i{int_sz}_sat" as the
literal opcode name when it should have been "f2i8_sat" or similar.

Fixes: c49d6e0480 ("nir/algebraic: Elide range clamping of f2u sources")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39031>
2026-01-08 13:19:35 -08:00
Yiwei Zhang
4f53828aa6 zink: tighten up export paths that require true dmabuf support
Some checks are pending
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The users of exportable might have different expectations for what can
be exported, and some are more tight. So we need a new exportable_dmabuf
flag to track where dmabuf is actually needed.

If the underlying driver does not advertise dmabuf extension, requesting
dmabuf export violates the spec VU:

> VUID-VkMemoryGetFdInfoKHR-handleType-00671
>
> handleType must have been included in
> VkExportMemoryAllocateInfo::handleTypes when memory was created

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38439>
2026-01-08 19:18:03 +00:00
Natalie Vock
60dd9d797e aco: Swizzle ray launch IDs in the RT prolog
This converts from 1D workgroups to 2D ray launch IDs entirely via
shader ALU, including handling partial/cut-off workgroups optimally.

Doing this entirely in-shader means it Just Works(TM) with indirect
dispatches as well. Previous approaches manipulating various things on
CPU depending on the dispatch size couldn't handle indirect dispatches.

The swizzle implemented here also swizzles with a recursive Z-order
pattern, which should be a little more optimal than arranging
invocations linearly within the wave.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
2026-01-08 19:49:55 +01:00
Natalie Vock
1f6ac3fa93 radv/rt,aco: Always dispatch 1D workgroups for RT
We will swizzle the workgroups ourselves in the next commit.
Removes the need for 1D dispatch workarounds.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
2026-01-08 19:49:54 +01:00
Natalie Vock
8baa95e4aa radv/rt: Use subgroup invocation for stack index
Workgroup == subgroup anyway, and we don't have the workgroup thread IDs
in RT shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
2026-01-08 19:49:45 +01:00
Caio Oliveira
c939744d2d brw: Consolidate generator code for emitting "regular" instructions
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Most of instructions follow the basic formats (1, 2 and 3 src), so
consolidate their emission code in generator.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38878>
2026-01-08 16:47:02 +00:00
Caio Oliveira
e1e055f23f brw: Move LRP related validation
Move validation, noting that LRP only supports BRW_TYPE_F -- the
previous assert had DF because it also was used by MAD in the past.
With that change, ALU3F can be replaced by ALU3 for LRP.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38878>
2026-01-08 16:47:02 +00:00
Caio Oliveira
68e1a07181 brw: Move normalization of 3-src instructions swizzles to a single place
When repctrl is used, the swizzle/chansel is ignored.  Instead of setting
a swizzle that has all zeros and encode that, don't encode anything.

For context see e7598c5a62 ("intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX
for scalar region").

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38878>
2026-01-08 16:47:01 +00:00
Gurchetan Singh
147ba7b1ae gfxstream: filter VkPhysicalDeviceProperties2 structs before encoder call
Otherwise, the following crash is observed on the host:

"Unhandled Vulkan structure type Unhandled VkStructureType [1000010002], aborting"

which corresponds to PHYSICAL_DEVICE_PRESENTATION_PROPERTIES_ANDROID.

We shouldn't be sending those structs down to the host.  Don't
post-process vkGetPhysicalDeviceProperties2, pre-process it to
filter the guest-only structs.

Reviewed-by: David Gilhooley <djgilhooley.gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39205>
2026-01-08 08:02:37 -08:00
Gurchetan Singh
f29a905ab6 gfxstream: explicitly list Python dependencies for gfxstream codegen
This helps Meson track when dependencies are modified.  If they
are modified, running ninja -C actually re-generates the code.
Beforehand, this was not the case and contrary to the user
expectation.

Reviewed-by: David Gilhooley <djgilhooley.gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39205>
2026-01-08 08:02:37 -08:00
Gurchetan Singh
933cb74c25 gfxstream: drm_fourcc.h --> drm-uapi/drm_fourcc.h
That's the include path that is provided by "inc_include".

Reviewed-by: David Gilhooley <djgilhooley.gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39205>
2026-01-08 08:02:37 -08:00