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3064 commits

Author SHA1 Message Date
Georg Lehmann
fd77cc7c32 ac/nir/lower_ps: move exports after packing alu 
If ACO's wqm section ends just before the first export, this mixing alu and
exports means the alu in question can't be reordered as much by the ILP
scheduler.

Foz-DB Navi31:
Totals from 8959 (11.31% of 79188) affected shaders:
Instrs: 5977212 -> 5978494 (+0.02%); split: -0.02%, +0.04%
CodeSize: 32982732 -> 32987876 (+0.02%); split: -0.01%, +0.03%
Latency: 35218073 -> 35216277 (-0.01%); split: -0.02%, +0.02%
InvThroughput: 5149751 -> 5149696 (-0.00%); split: -0.00%, +0.00%
SClause: 220552 -> 220551 (-0.00%); split: -0.01%, +0.01%
PreVGPRs: 313203 -> 313069 (-0.04%); split: -0.06%, +0.01%

Foz-DB Navi21:
Totals from 8895 (11.21% of 79377) affected shaders:
MaxWaves: 219280 -> 219272 (-0.00%); split: +0.00%, -0.01%
Instrs: 5393330 -> 5393366 (+0.00%); split: -0.00%, +0.00%
CodeSize: 29921900 -> 29922024 (+0.00%); split: -0.00%, +0.00%
VGPRs: 406664 -> 406688 (+0.01%); split: -0.00%, +0.01%
Latency: 35653975 -> 35652220 (-0.00%); split: -0.02%, +0.02%
InvThroughput: 7992134 -> 7992032 (-0.00%); split: -0.00%, +0.00%
SClause: 223784 -> 223786 (+0.00%)
Copies: 370984 -> 370983 (-0.00%)
PreVGPRs: 314323 -> 314330 (+0.00%); split: -0.01%, +0.01%
VALU: 3800023 -> 3800022 (-0.00%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33417>
 2025-02-08 17:31:18 +00:00
Rhys Perry
c3d27906d8 radv: vectorize lowered shader IO 
fossil-db (navi31):
Totals from 2329 (2.93% of 79377) affected shaders:
MaxWaves: 72152 -> 72102 (-0.07%)
Instrs: 1048791 -> 1041920 (-0.66%); split: -0.72%, +0.07%
CodeSize: 5331832 -> 5285572 (-0.87%); split: -0.90%, +0.03%
VGPRs: 113844 -> 113820 (-0.02%); split: -0.14%, +0.12%
Latency: 4349524 -> 4346374 (-0.07%); split: -0.35%, +0.28%
InvThroughput: 609449 -> 609235 (-0.04%); split: -0.27%, +0.24%
VClause: 22613 -> 22451 (-0.72%); split: -1.03%, +0.31%
SClause: 21197 -> 21177 (-0.09%); split: -0.45%, +0.35%
Copies: 81900 -> 82446 (+0.67%); split: -1.51%, +2.18%
PreSGPRs: 94697 -> 93596 (-1.16%); split: -1.23%, +0.07%
PreVGPRs: 69962 -> 70080 (+0.17%); split: -0.01%, +0.18%
VALU: 625247 -> 625390 (+0.02%); split: -0.23%, +0.25%
SALU: 101692 -> 101555 (-0.13%); split: -0.24%, +0.11%
VMEM: 46459 -> 44845 (-3.47%)

fossil-db (navi21):
Totals from 17522 (22.07% of 79377) affected shaders:
MaxWaves: 425698 -> 425460 (-0.06%); split: +0.00%, -0.06%
Instrs: 11444215 -> 11428321 (-0.14%); split: -0.14%, +0.00%
CodeSize: 59227492 -> 59019376 (-0.35%); split: -0.35%, +0.00%
VGPRs: 780920 -> 781208 (+0.04%); split: -0.00%, +0.04%
Latency: 44965072 -> 44926529 (-0.09%); split: -0.12%, +0.03%
InvThroughput: 9718148 -> 9728793 (+0.11%); split: -0.01%, +0.12%
VClause: 225732 -> 225605 (-0.06%); split: -0.10%, +0.04%
SClause: 217196 -> 217160 (-0.02%); split: -0.03%, +0.01%
Copies: 1050351 -> 1065263 (+1.42%); split: -0.03%, +1.45%
PreSGPRs: 747538 -> 747223 (-0.04%); split: -0.05%, +0.01%
PreVGPRs: 626702 -> 626748 (+0.01%); split: -0.00%, +0.01%
VALU: 6629403 -> 6643822 (+0.22%); split: -0.01%, +0.23%
SALU: 1898492 -> 1898452 (-0.00%); split: -0.00%, +0.00%
VMEM: 529942 -> 528361 (-0.30%)

fossil-db (vega10):
Totals from 1791 (2.84% of 62962) affected shaders:
MaxWaves: 12270 -> 12253 (-0.14%); split: +0.01%, -0.15%
Instrs: 602026 -> 597473 (-0.76%); split: -0.83%, +0.08%
CodeSize: 3109872 -> 3071664 (-1.23%); split: -1.26%, +0.03%
SGPRs: 137826 -> 137938 (+0.08%); split: -0.10%, +0.19%
VGPRs: 70364 -> 70520 (+0.22%); split: -0.03%, +0.26%
Latency: 4757850 -> 4781905 (+0.51%); split: -0.35%, +0.86%
InvThroughput: 2296941 -> 2310685 (+0.60%); split: -0.14%, +0.74%
VClause: 14161 -> 14050 (-0.78%); split: -1.23%, +0.44%
SClause: 14058 -> 14077 (+0.14%); split: -0.57%, +0.70%
Copies: 40954 -> 42191 (+3.02%); split: -1.69%, +4.71%
PreSGPRs: 64314 -> 63214 (-1.71%); split: -1.81%, +0.10%
PreVGPRs: 53558 -> 53894 (+0.63%); split: -0.01%, +0.64%
VALU: 449920 -> 450830 (+0.20%); split: -0.19%, +0.39%
SALU: 32973 -> 32839 (-0.41%); split: -0.76%, +0.35%
VMEM: 28796 -> 25151 (-12.66%)

fossil-db (polaris10):
Totals from 1769 (2.86% of 61794) affected shaders:
MaxWaves: 12024 -> 12021 (-0.02%)
Instrs: 474761 -> 470760 (-0.84%); split: -0.94%, +0.10%
CodeSize: 2447964 -> 2420712 (-1.11%); split: -1.15%, +0.04%
SGPRs: 129664 -> 129728 (+0.05%); split: -0.14%, +0.19%
VGPRs: 65216 -> 65560 (+0.53%); split: -0.05%, +0.58%
Latency: 4304734 -> 4318319 (+0.32%); split: -0.41%, +0.72%
InvThroughput: 2114950 -> 2122580 (+0.36%); split: -0.18%, +0.54%
VClause: 10933 -> 10808 (-1.14%); split: -1.42%, +0.27%
SClause: 11430 -> 11446 (+0.14%); split: -0.70%, +0.84%
Copies: 32290 -> 31891 (-1.24%); split: -2.80%, +1.56%
PreSGPRs: 58184 -> 57096 (-1.87%); split: -1.98%, +0.11%
PreVGPRs: 48757 -> 48874 (+0.24%); split: -0.02%, +0.26%
VALU: 359097 -> 358582 (-0.14%); split: -0.25%, +0.11%
SALU: 26279 -> 25934 (-1.31%); split: -1.75%, +0.43%
VMEM: 18825 -> 17247 (-8.38%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
f034aa9cd3 radv: don't use bit_sizes_int to skip nir_lower_bit_size 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
19394f44df ac/nir: set memory_modes for lowered TES input loads 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
1fca72ddc8 ac/nir/ngg: update bit_sizes_int 
This is used for RADV's bit size lowering.

fossil-db (navi21):
Totals from 4520 (5.69% of 79377) affected shaders:
(no stat changes)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
David Rosca
62b0f84981 ac/vcn_dec: Fix AV1 film grain on VCN5 
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33376>
 2025-02-07 13:13:45 +00:00
Samuel Pitoiset
8625decbcc radv: fix fetching draw vertex data from counter buffers with transform feedback 
counterOffset was just ignored and nobody noticed (missing VKCTS
coverage).

VGT_STRMOUT_DRAW_OPAQUE_OFFSET will do the computation in hw for us.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33407>
 2025-02-07 07:59:39 +00:00
Mike Blumenkrantz
602f19bad8 ac/surface: always allow LINEAR modifier for color formats 
this is always supported

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33323>
 2025-02-06 01:48:25 +00:00
Qiang Yu
da023a5a19 ac/surface: fix radv import dmabuf from radeonsi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33391>
 2025-02-05 09:26:22 +00:00
Samuel Pitoiset
bd8575ebd3 radv: implement derivative group quads on GFX12 
It's natively supported by the hw.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33303>
 2025-02-04 08:11:16 +00:00
Samuel Pitoiset
9993f3dd6a ac,radv,radeonsi: add new GFX12_DCC_WRITE_COMPRESS_DISABLE tiling flag 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33301>
 2025-02-03 21:12:07 +00:00
Marek Olšák
82047fa82f amd: drop support for LLVM 15, 16, 17 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33211>
 2025-02-01 04:22:30 +00:00
Timur Kristóf
150123349a ac/nir/ngg: Use SALU to calculate which threads store to attribute ring in GS. 
This trades 1 VALU (v_cmpx) instruction in GS to 2 SALU,
and removes a VALU->SALU dependency for the branch that stores
attributes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
5560763e99 ac/nir/ngg: Move GS lowering to separate file. 
Both the VS/TES and GS lowering passes have grown a lot over time,
and therefore the C file has become unwieldy. Mitigate that by
moving the GS lowering out to a separate file.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
ab8ec78c93 ac/nir/ngg: Don't call has_input_primitive in GS lowering. 
The entire GS lowering will be moved to another file, which
won't have this function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
910416e5ba ac/nir/ngg: Remove now unused export_pos0_wait_attr_ring. 
The issue is worked around now without needing to handle just
the pos0 separately.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
28fe7e2a0e ac/nir/ngg: Rework GS output code for better attribute ring handling. 
Create separate branches for output processing and exports.

Normally, emit attribute ring stores at the end of the shader,
but with the attribute ring wait bug, insert them between the
primitive and position export branches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
213759d2b6 ac/nir/ngg: Carve out ngg_gs_process_out_vertex. 
This is	the part of the	code that processes things related to
a single vertex, mainly loading the outputs from LDS and
performing some adjustments on them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
4f8ee9b045 ac/nir/ngg: Carve out ngg_gs_process_out_primitive. 
This is the part of the code that processes things related to
a single primitive, mainly the primitive export argument.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
04b4c5d785 ac/nir/ngg: Rework attribute ring wait workaround in VS/TES. 
Normally, emit attribute ring stores at the end of the shader.
When the attribute ring wait bug is present, insert them between
the primitive and position exports.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
dec5c957c3 ac/nir/ngg: Use has_attr_ring and has_attr_ring_wait_bug in mesh shader lowering too. 
Instead of hardcoding according to GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
f7305f776e ac/nir/ngg: Pass radeon_info to mesh shader lowering. 
Same idea as the VS/TES and GS lowering:
Make shader compilation decisions based on the features of the
current GPU instead of ad-hoc deciding according to GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
b8204c8df9 ac/nir/ngg: Remove gfx_level and family from NGG lowering options. 
They can be read from radeon_info.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
dc6ae1855a ac/nir/ngg: Use gfx_level from radeon_info. 
So we don't have to pass it separately.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
e1be943f10 ac/nir/ngg: Add and use a has_ngg_passthru_no_msg field to ac_gpu_info. 
Instead of using the chip family field.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
a40000b85b ac/nir/ngg: Add and use a has_ngg_fully_culled_bug field to ac_gpu_info. 
Better than applying the workaround ad-hoc based on GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
cad0d26dbf ac/nir/ngg: Add and use a has_attr_ring field to ac_gpu_info. 
While theoretically all GFX11+ GPUs have an attribute ring, it is
nicer to have this property instead of deciding ad-hoc based on
the GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
b163ce51b1 ac/nir/ngg: Add and use a has_attr_ring_wait_bug field to ac_gpu_info. 
And apply the attribute ring wait workaround based on the new field.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
e76361d626 ac/nir/ngg: Add radeon_info to NGG lowering options. 
The intention is to have all the HW features affecting
shader compilation in one place, instead of ad-hoc decisions
in the code based on the GFX level and chip class.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
28c501f22c ac/nir/ngg: Slightly refactor emitting vertex parameters. 
No functional changes, just some code cleanup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
9860fb3780 ac/nir/ngg: Carve out ac_nir_repack_invocations_in_workgroup. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
d2ff3f9fa0 ac/nir/ngg: Carve out NGG streamout code. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
1d8f46e00c ac/nir/ngg: Carve out ac_nir_create_output_phis. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
4bec453595 ac/nir/ngg: Use ac_nir_ngg_alloc_vertices_and_primitives in mesh shader lowering. 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
02dacac869 ac/nir/ngg: Carve out ac_nir_ngg_alloc_vertices_and_primitives. 
We're going to want to call it from a different file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
a3d8e6a60c ac/nir/ngg: Remove unused vs_output struct. 
Forgot to remove this when I refactored the code to use
ac_nir_prerast_out instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
23641d4032 ac/nir/ngg: Add a few comments explaining some variables. 
These were somewhat confusing, so let's add a few words to
explain what they are exactly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
28f49bf99c ac/nir/ngg: Remove some superfluous variables from culling code. 
No functional changes, just code cleanup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
7a3d95bbe2 ac/nir/ngg: Mitigate attribute ring wait bug when primitive ID is per-primitive. 
There is a possibility that some waves in an NGG workgroup
don't have any input vertices, only primitives. When these
waves store the primitive ID as a per-primitive attribute,
they will need to wait for those stores before the primitive
export, because the other waves can't wait for them.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
397d45d055 ac/nir/ngg: Mitigate NGG fully culled bug when GS output is compile-time zero. 
This case is unlikely but possible. We forgot to handle it here,
because it was originally handled by the backend compiler.

On GFX10 chips that have issues with 0 vertices and primitives
exported, this will always export at least 1 vertex and primitive.

This could theoretically fix some hangs on Navi 10, although we are not aware of a specific issue caused by this problem.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Samuel Pitoiset
5ac72c5f56 ac/descriptors: allow to configure DCC for buffer descriptors 
This is not used yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
 2025-01-30 08:18:22 +00:00
Samuel Pitoiset
fe6494559d ac,radeonsi: add SDMA DCC tiling for GFX12+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
 2025-01-30 08:18:22 +00:00
Marek Olšák
d0e1c508c6 ac/fake_hw_db: deobfuscate GPU name strings 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:02 +00:00
Marek Olšák
43588be435 radeonsi: remove an incorrectly defined modifier 
It's missing the PACKERS field to distinguish between different layouts
and it's a useless swizzle mode anyway.

Fixes: 0833dd7d12 - amd/common: Add support for modifiers.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9344

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:01 +00:00
Marek Olšák
71e95b373b radeonsi: remove si_shader_info code that is no longer needed 
A lot of this info is now derived from shader variant NIR.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:56 +00:00
Marek Olšák
8e8eda4089 radeonsi: fix PS prolog not counting used fragcoord VGPRs correctly 
Using the used component count is not enough. We need to consider
the component mask because any component can be disabled. This might
fix tests.

This removes the component counting from ac_get_fs_input_vgpr_cnt
and determines the component mask where it's needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:40 +00:00
Marek Olšák
b3fc49686e ac/nir: clamp vertex color outputs in the right place 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:38 +00:00
Samuel Pitoiset
48d199f3dc ac/gpu_info: add gfx12_supports_display_dcc 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33212>
 2025-01-27 08:08:15 +00:00
Marek Olšák
f7e3689fe1 ac/nir: lower sample_pos to load_sample_positions_amd when frag_coord is center 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33024>
 2025-01-25 12:20:26 -05:00
Marek Olšák
0a228dfef2 ac/nir: compute ddx/ddy for barycentric_at_offset at the beginning of shaders 
to make it work after terminate (discard).

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33024>
 2025-01-25 12:20:26 -05:00