Commit graph

209459 commits

Author SHA1 Message Date
Eric Engestrom
461196a1c8 VERSION: bump for 25.2.7 2025-11-12 18:53:52 +01:00
Eric Engestrom
f9c7965993 docs: add release notes for 25.2.7 2025-11-12 18:53:52 +01:00
Natalie Vock
133e347a98 radv: Fix PSO history with RT pipelines
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
1. The prolog needs to have a null check. Libraries don't have prologs.
2. We only need to print the shaders actually included in this pipeline.
   Libraries were already printed separately.
3. The traversal shader was wrongly omitted from the output.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38355>
(cherry picked from commit 73a31dafbc)
2025-11-12 10:09:24 +01:00
Sviatoslav Peleshko
160c254722 driconf: Add vertex_program_default_out option for Penumbra: Overture
Penumbra's vertex program Diffuse_EnvMap_Reflect_vp.cg produces 3-component
texture coordinates and primitive colors while using the FF fragment
program. Add this WA to fix the misrenderings.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14170
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38295>
(cherry picked from commit 5af8abbf8b)
2025-11-12 10:09:23 +01:00
Sviatoslav Peleshko
198bc5852c mesa,driconf: Add WA to initialize vertex program outputs to vec4(0,0,0,1)
Per ARB_vertex_program spec result registers are 4-component and initially
undefined, and the FF fragment program expects its intputs to be
4-component too. So, if the client's vertex program does not write the
whole vector it will cause misrenderings unless the same client also
supplies fragment program that expects less than 4 componens.

This commit adds a workaround that initializes results to vec4(0, 0, 0, 1)
which seems to be an expected behavior for such clients.

Cc: mesa-stable
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38295>
(cherry picked from commit f03432c81a)
2025-11-12 10:09:23 +01:00
Faith Ekstrand
eb620334d7 nir: Add a couple panfrost sysvals to divergence analysis
Fixes: 2af6e4beeb ("pan: Don't pretend we support load_{vertex_id_zero_base,first_vertex}")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayern@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38334>
(cherry picked from commit 0e9fcb33c3)
2025-11-12 10:09:23 +01:00
Tapani Pälli
f3cfcbf6eb anv: fix issues found with indirect data stride
Use tristate for the aligned setting, otherwise it is always
first disabled which contributes to the condition if we set the
new stride active.

v2: set ByteStride in dword units and take secondary cmdbuf
    in to account (Lionel)

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38349>
(cherry picked from commit 2741ddd75a)
2025-11-12 10:09:23 +01:00
Sagar Ghuge
ffbf10eb44 intel/common: Consider 0 threads while setting TG
In ray tracing dispatch, we have dispatch.threads set to 0 since we
calculate the local_size_x/y/z based on the launch sizes.

This change takes 0 threads into an account and returh the TG size 8 in
such scenarios. Before this change, we were setting TG size to 2.

Fixes: 0c4e1c9efc ("intel/common: Add helper for compute thread group dispatch size")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38229>
(cherry picked from commit 16f66ffe55)
2025-11-12 10:09:23 +01:00
Karol Herbst
c67dba9f9f rusticl/spirv: preserve signed zeroes by default
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38327>
(cherry picked from commit 92a4ae0ab2)
2025-11-12 10:09:23 +01:00
Karol Herbst
e53e1c101d rusticl/kernel: take no kernel_info reference inside the launch closure
Otherwise patterns like this wouldn't work:

clCreateKernel(prog)
clEnqueueNDRangeKernel
clReleaseKernel
clBuildProgram(prog)

Fixes: bb2453c649 ("rusticl/kernel: move most of the code in launch inside the closure")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38327>
2025-11-12 10:09:23 +01:00
Karol Herbst
115998231d rusticl/queue: fix error code for invalid sampler kernel arg
Fixes: 5795ee0e08 ("rusticl: translate spirv to nir and first steps to kernel arg handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38327>
(cherry picked from commit c0f0baeaca)
2025-11-12 10:09:23 +01:00
Karol Herbst
3359b8d414 rusticl/queue: fix error code for invalid queue properties part 2
Fixes: 2c202eb787 ("rusticl: verify validity of property names and values")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38327>
(cherry picked from commit e98abe35c0)
2025-11-12 10:09:23 +01:00
Karol Herbst
3a7f25f9f5 rusticl/queue: fix error code for invalid queue properties part 1
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38327>
(cherry picked from commit e83400cab2)
2025-11-12 10:09:23 +01:00
Eric Engestrom
013616f8c5 ci: track src/android_stub/ changes
Fixes: 932f51d593 ("ci: Include enough Android headers to let us compile test EGL")
Suggested-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38346>
(cherry picked from commit f689322d27)
2025-11-12 10:09:23 +01:00
Eric Engestrom
bcfb851af3 ci: track src/c11/ changes
It's used by mesa_util, so let's just consider changes to it can affect
any job.

Fixes: b2ddec4e98 ("c11: Implement c11/time.h with c11/impl/time.c")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38346>
(cherry picked from commit 2ec3e536fd)
2025-11-12 10:09:23 +01:00
Dave Airlie
675a631115 c11/threads: fix build on c23
C23/glibc is now including once_init in stdlib.h

https://patchwork.sourceware.org/project/glibc/patch/78061085-f04a-0c45-107b-5a8a15521083@redhat.com/#213088

Just fix up our use of it.

Cc: mesa-stable
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38298>
(cherry picked from commit 179e744f75)
2025-11-12 10:09:23 +01:00
Karol Herbst
e1e6be5c40 st/interop: fix fence leak
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14050
Fixes: 1396dc1c38 ("mesa/st, dri2, wgl, glx: Modify flush_objects interop func to export a fence_fd")
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38310>
(cherry picked from commit 87550fc657)
2025-11-12 10:09:22 +01:00
Faith Ekstrand
d35aa6f444 nil: Add support for Blackwell 8 and 16-bit modifiers
Backport-to: 25.2
Reviewed-by: James Jones <jajones@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36336>
(cherry picked from commit f1cb63a21d)
2025-11-12 10:09:22 +01:00
Faith Ekstrand
3d594aba56 drm-uapi: Import the new NVIDIA modifiers
Imported from kernel commit eef295a850820 of drm-misc-fixes

Backport-to: 25.2
Reviewed-by: James Jones <jajones@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36336>
(cherry picked from commit 3247452b2c)
2025-11-12 10:09:22 +01:00
Sagar Ghuge
7e56af1b6d anv: Drop unwanted untyped flush for AS query
CmdWriteAccelerationStructuresPropertiesKHR writes the data with MI
commands, we no longer dispatch shaders to write the properties.
As a result, we don't need to flush untyped cache.

Fixes: f0e18c475b ("intel: remove GRL/intel-clc")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38291>
(cherry picked from commit 14194e59a4)
2025-11-12 10:09:22 +01:00
Benjamin Cheng
90a5e948dc radv/video: Fix dummy DPB addresses
This fixes the VVL PositiveVideoDecodeAV1.* tests, which trigger error
concealment. These DPB addresses would not be normally used, but get
used by the error concealment path.

Fixes: d103b76ad6 ("radv/video: add VK_KHR_video_decode_av1 support.")
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38311>
(cherry picked from commit 82d944b388)
2025-11-12 10:09:22 +01:00
Ludvig Lindau
f9e034bf26 panfrost: Make instrs_equal check res table/index
Add resource table and index check to instruction equality function.
This prevents CSE from mistakenly eliminating LEA_BUF_IMM instructions
that load from different resources, but with the same buffer offset.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
(cherry picked from commit 00b5275fe8)
2025-11-12 10:09:22 +01:00
Lars-Ivar Hesselberg Simonsen
7b5bda3fcc pan/format: Disable PAN_BIND_STORAGE_IMAGE for RGBA4/BGRA4
The RGBA4/BGRA4 formats had the PAN_BIND_STORAGE_IMAGE set, but we
cannot support that.

Fixes: d95423686f ("pan/format: Add PAN_BIND_STORAGE_IMAGE flag")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
(cherry picked from commit 15868cf6e9)
2025-11-12 10:09:22 +01:00
Lars-Ivar Hesselberg Simonsen
e9b36a318d pan/format: Fix mapping for I16F
This was mapped to RG16F, while R16F should be correct.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
(cherry picked from commit 1e2ca4dad6)
2025-11-12 10:09:22 +01:00
Lars-Ivar Hesselberg Simonsen
9494a7fa83 panvk: Fix IUB decode
The base address used for bounds checking the entry was wrong. Directly
pass the end_of_entry address instead.

Fixes: db4bcd48d7 ("panvk: Fix IUB decode")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
(cherry picked from commit 89293120f0)
2025-11-12 10:09:22 +01:00
Danylo Piliaiev
aa1dd15b2c tu: Use cmd->rp_trace u_trace for draw calls
Fixes: 707c97f634 ("tu: Add tracepoints around draws, with shader sha1s.")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38240>
(cherry picked from commit c04e375588)
2025-11-12 10:09:22 +01:00
Lionel Landwerlin
70fd7c41b5 vulkan/runtime: simplify robustness state hashing
We're doing the same in vk_pipeline_precomp_shader_create().

Also fixes valgrind warning due to uninitialized fields

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36647>
(cherry picked from commit fc6d17a290)
2025-11-12 10:09:22 +01:00
Daniel Schürmann
7860ec361f radv/null_device: set more options which affect compilation
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37525>
(cherry picked from commit 23ef756496)
2025-11-12 10:09:21 +01:00
David Rosca
ea7122e249 radv/video: Add NULL checks for picture parameters
Fixes vk_layer_validation_tests PositiveVideoDecode.* and
PositiveVideoDecode*.InlineSessionParams

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38158>
(cherry picked from commit bd151bf8b2)
2025-11-12 10:09:21 +01:00
David Rosca
1dee784011 radv/video: Correctly handle no feedback query for encode
Fixes vk_layer_validation_tests PositiveVideoEncodeAV1.*

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38158>
(cherry picked from commit 23a3587aa6)
2025-11-12 10:09:21 +01:00
David Rosca
9c1348741c vulkan/video: Avoid NULL pointers in session parameters
Always copy parameters that are not guarded by a flag, zero init
the structs if not provided by application.

Fixes vk_layer_validation_tests PositiveVideoEncode*.GetEncodedSessionParams

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38158>
(cherry picked from commit 6a1c6ab95b)
2025-11-12 10:09:21 +01:00
Benjamin Cheng
c11c07847d vulkan/video: NULL check codec-specific chain
It seems applications are allowed to do no-op updates by not passing any
codec-specific extension structures.

Cc: mesa-stable
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38158>
(cherry picked from commit 4d22427079)
2025-11-12 10:09:21 +01:00
Timothy Arceri
712cbacf51 mesa: skip redundant uniform update optimisation if unsafe
If multiple contexts are updating uniform values we can't assume
a uniform update can skip flushing.

Fixes: b32e20e630 ("mesa: skip redundant uniform updates for glUniformHandle")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14129

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38101>
(cherry picked from commit 34db720660)
2025-11-12 10:09:21 +01:00
Lionel Landwerlin
fa480da7fd anv: avoid invalid timestamp generation due to skipped commands
We skip the stall emission for STATE_BASE_ADDRESS since this one can
be skipped on Gfx12.5+ and instead add a new sba tracepoint that has
valid timestamps.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0147908a89 ("anv: predicate emission of STATE_BASE_ADDRESS")
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38256>
(cherry picked from commit cff047280a)
2025-11-12 10:09:21 +01:00
Yiwei Zhang
8a3d79512b glcpp/meson: fix libglcpp generated header dependency
Explicitly declare glcpp-parse.h as a file dependency to ensure
glcpp_parse custom target completes before compiling glcpp-lex.c.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38254>
(cherry picked from commit 53482178ef)
2025-11-12 10:09:21 +01:00
Georg Lehmann
a4c98e97ab aco/gfx10_3: work around NSA hazard
4+ dword NSA can hang if exec becomes non-zero again directly before
the instruction.

Foz-DB Navi21:
Totals from 608 (0.74% of 82161) affected shaders:
Instrs: 945138 -> 946431 (+0.14%)
CodeSize: 5171580 -> 5176864 (+0.10%)
Latency: 13356895 -> 13357113 (+0.00%)
InvThroughput: 3043234 -> 3043236 (+0.00%); split: -0.00%, +0.00%

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9852
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13981
Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38215>
(cherry picked from commit b2172467d1)
2025-11-12 10:09:21 +01:00
David Rosca
d5b344054c radv/video: Fix AV1 bidir compound encode with order_hint disabled
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
(cherry picked from commit bcb6e6b6e6)
2025-11-12 10:09:21 +01:00
David Rosca
a4bf4cf8de radv/video: Don't require encode FW version >= interface version
Otherwise this breaks backwards compatibility when bumping interface
version for new features.

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
(cherry picked from commit 96db490318)
2025-11-12 10:09:21 +01:00
David Rosca
9c23a3a745 radeonsi/vcn: Fix AV1 bidir compound encode with order_hint disabled
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
(cherry picked from commit 1a8a8db8c5)
2025-11-12 10:09:21 +01:00
Yiwei Zhang
6ce43552cd llvmpipe: misc fixes for sparse binding
This change:
1. Move size validation within sparse binding, but not escape to
   non-sparse code path.
2. Error out if sparse is requested on unsupported platforms.

Fixes: d747c4a874 ("lavapipe: Implement sparse buffers and images")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
(cherry picked from commit e0acc5c2b4)
2025-11-12 10:09:20 +01:00
Yiwei Zhang
36f0885c44 llvmpipe: add a missing alloc error handling in fd import
Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Suggested-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
(cherry picked from commit 66414c6b70)
2025-11-12 10:09:20 +01:00
Yiwei Zhang
fd085d2e3e llvmpipe: fix udmabuf mmap error check
Upon failing to mmap, MAP_FAILED (void *)-1 is returned instead of NULL.

Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
(cherry picked from commit 3e07f57d4a)
2025-11-12 10:09:20 +01:00
Yiwei Zhang
ab5f1669d2 llvmpipe: zero is also a valid fd
Fixes: a062544d3d ("llvmpipe: Use an anonymous file for memory allocations")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
(cherry picked from commit 3a655c212b)
2025-11-12 10:09:20 +01:00
Samuel Pitoiset
90892e886f radv,aco: wait for all VMEM loads when the prolog loads large 64-bit attributes
Not the most optimal solution but 64-bit vertex attributes are rarely
used. Could still revisit if we find a real use case that matters.

This fixes recent VKCTS coverage:

dEQP-VK.pipeline.fast_linked_library.vertex_input.component_mismatch.r64g64b64.*_to_dvec2
dEQP-VK.pipeline.shader_object_.*.vertex_input.component_mismatch.r64g64b64.*_to_dvec2

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14243
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38237>
(cherry picked from commit a0d607bfdb)
2025-11-12 10:09:20 +01:00
Samuel Pitoiset
9cc48665b1 aco: fix reserving VGPRs for 64-bit attributes in VS prologs
Otherwise the fetch index would be overwritten if the attribute format
is 64-bit and more than 2 components are loaded.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14242
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38237>
(cherry picked from commit ba5bf81aa2)
2025-11-12 10:09:20 +01:00
Yiwei Zhang
92974d930b panvk: fix sample shading of internal blend shader for MSAA
Align with gallium side. When fixed-function blending is not available,
the internal blend shader is used. This is handled by a single ST_TILE
in the blend shader with the current sample ID, which requires sample
shading enablement.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38129>
(cherry picked from commit 763d2418b8)
2025-11-12 10:09:20 +01:00
Lionel Landwerlin
9218b7a9a2 u_trace: reserve chunk space before emitting copies
Some implementations can emit tracepoints when copying u_trace
buffers. It's important to reserve the slots we want to copy into
before emitting the copies so that both processes don't clash with one
another.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38199>
(cherry picked from commit df5f92d114)
2025-11-12 10:09:20 +01:00
Danylo Piliaiev
2162362f8b vulkan: Always fill DS state for EXT_dynamic_rendering_unused_attachments
If renderpass has D/S attachment, but pipeline has D/S as UNDEFINED,
D/S should be properly disabled for the pipeline. The easiest way is to
ensure that D/S state is valid when pipeline's D/S format is UNDEFINED.
So we always create VkPipelineDepthStencilStateCreateInfo.

CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37550>
(cherry picked from commit 2798ef7bfd)
2025-11-12 10:09:20 +01:00
Ryan Houdek
b2178afb93 freedreno/fdl: Fix typo in tiled_to_linear_2cpp
The non-aarch64 path was copying in the wrong direction.

Fixes: 7a5a33e0e3 ("freedreno/fdl: Add tiling/untiling implementation for a6xx/a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38226>
(cherry picked from commit 455eb2c751)
2025-11-12 10:09:20 +01:00
Mel Henning
4ca61f20f3 nak/opt_lop: Don't handle modifiers in dedup_srcs
The handling in dedup_srcs was incorrect because it would apply the
modifier from srcs[i] to the LUT without removing the modifier from the
instruction. We can fix and simplify this code by removing all modifiers
before the dedup_srcs() call, which we were doing immediately after the
call anyway.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13966
Fixes: 66c9c40f68 ("nak: Handle modifiers in dedup_srcs() in opt_lop()")
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Reviewed-by: Lorenzo Rossi <git@rossilorenzo.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38220>
(cherry picked from commit 041216e605)
2025-11-12 10:09:20 +01:00