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aco: fix reserving VGPRs for 64-bit attributes in VS prologs
Otherwise the fetch index would be overwritten if the attribute format is 64-bit and more than 2 components are loaded. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14242 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38237>
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1 changed files with 19 additions and 1 deletions
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@ -338,6 +338,22 @@ load_unaligned_vs_attrib(Builder& bld, PhysReg dst, Operand desc, Operand index,
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state->current_loads.push_back(load);
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}
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bool
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is_last_attribute_large(const struct aco_vs_prolog_info* pinfo)
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{
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const struct ac_vtx_format_info* vtx_info_table =
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ac_get_vtx_format_info_table(GFX8, CHIP_POLARIS10);
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unsigned last_attribute = pinfo->num_attributes - 1;
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if ((pinfo->misaligned_mask & (1u << last_attribute))) {
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const struct ac_vtx_format_info* vtx_info = &vtx_info_table[pinfo->formats[last_attribute]];
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if (vtx_info->chan_byte_size == 8 && vtx_info->num_channels > 2)
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return true;
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}
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return false;
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}
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} // namespace
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void
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@ -393,9 +409,11 @@ select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_sh
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has_nontrivial_divisors && (program->gfx_level <= GFX8 || program->gfx_level >= GFX11);
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int vgpr_offset = pinfo->misaligned_mask & (1u << (pinfo->num_attributes - 1)) ? 0 : -4;
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const bool is_last_attr_large = is_last_attribute_large(pinfo);
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unsigned num_vgprs = args->num_vgprs_used;
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PhysReg attributes_start = get_next_vgpr(pinfo->num_attributes * 4, &num_vgprs);
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PhysReg attributes_start =
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get_next_vgpr(pinfo->num_attributes * 4 + (is_last_attr_large ? 4 : 0), &num_vgprs);
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PhysReg vertex_index, instance_index, start_instance_vgpr, nontrivial_tmp_vgpr0,
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nontrivial_tmp_vgpr1;
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if (needs_vertex_index)
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