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Author SHA1 Message Date
Samuel Pitoiset
7f84c0056f ac/perfcounter: add new GCEA_CPWD block definition on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39100>
 2026-01-05 10:02:05 +00:00
Samuel Pitoiset
3722ef141c ac/spm: fix a crash with the RT counters on GFX10 
They are only enabled on GFX10.3+.

Fixes: 8bc37d0d19 ("ac/spm: add support for Ray Tracing counters in RGP")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39127>
 2026-01-05 09:05:50 +00:00
Samuel Pitoiset
a057800300 ac/perfcounter: compute the number of block instance properly on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
87b938ce41 ac/perfcounter: update configuration of many blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
381e4f4c9f ac/perfcounter: fix the number of static instances for some blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:04 +00:00
Samuel Pitoiset
91fdbadacc ac/perfcounter: define a distribution mode for all perf blocks on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:03 +00:00
Samuel Pitoiset
736ddb6ba8 ac/perfcounter: move configuration for GFX10 in a separate file 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:03 +00:00
Samuel Pitoiset
6374484123 ac/perfcounter: compute the number of block instance properly on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:02 +00:00
Samuel Pitoiset
a037feb40b ac/perfcounter: update configuration of many blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:02 +00:00
Samuel Pitoiset
b7c2e38019 ac/perfcounter: fix the number of static instances for some blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
1925d61a7b ac/perfcounter: define a distribution mode for all perf blocks on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
f4bc670ddf ac/perfcounter: move configuration for GFX10.3 in a separate file 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:01 +00:00
Samuel Pitoiset
abc72740a7 ac/perfcounter: fix number of instances for GCEA 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39126>
 2026-01-05 08:38:00 +00:00
Eric Engestrom
c63732463a radv/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39140>
 2026-01-03 16:27:56 +00:00
Timur Kristóf
c05d276473 radv: Mitigate GFX6-7 SMEM bug for robust OOB access
Some checks are pending
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Implement a mitigation for VM faults caused by SMEM reading
out of bounds when using robust buffer access.

- Pad uniform and storage buffer allocations with a readonly VM page
- Clamp SMEM offsets that can potentially read past the next page

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00
Timur Kristóf
f866bed0db radv: Mitigate GFX6-7 SMEM bug for NULL and mutable descriptors 
Implement a mitigation for VM faults caused by SMEM reading
from NULL descriptors.

In order to satisfy VKD3D-Proton's expectations on mutable
descriptors, we must do this in shader code, it is not
sufficient to use the address of a mapped BO when writing
null descriptors. It is not feasible to mitigate this
in VKD3D-Proton.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00
Timur Kristóf
10a5e5e4f3 radv/amdgpu: Add ability to pad BOs with a read-only VM page 
Map the first page of the same BO as read-only after the BO itself
in order to pad each BO with an extra page. This doesn't require
us to allocate any memory.

This is going to be used for a HW bug mitigation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00
Timur Kristóf
18b8543026 ac/nir: Add pass to fixup SMEM on GFX6-7 
The pass implements two mitigations for the GFX6-7 SMEM bug:

1. To mitigate VM faults by NULL descriptors:

Make sure that SMEM buffer loads always access a mapped BO.
Use either the descriptor BO (or compute scratch BO),
or otherwise use the zero-filled BO in their place.

2. To mitigate VM faults by OOB robust buffer access:

Add an instruction to clamp the offset source to the
num_records field of the descriptor. It will be still
out of bounds, but the VM fault can be completely mitigated
if the driver adds a padding to each memory allocation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00
Timur Kristóf
7023ef4b8b ac/cu_info: Add GFX6-7 SMEM OOB bug 
On GFX6-7, SMEM instructions access memory when num_records == 0
or offset >= num_records, which causes VM faults when reading a
page that isn't mapped.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38769>
 2026-01-02 23:42:16 +00:00
Marek Olšák
bd9206192d radv: use ac_set_sx_downconvert_state_for_mrt 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39093>
 2026-01-02 16:46:20 +00:00
Marek Olšák
d0dd5a5f57 ac,radeonsi: move SX PS downconversion code into ac_formats.c 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39093>
 2026-01-02 16:46:20 +00:00
Marek Olšák
e64e41f69e radv: fix halved pixel throughput for a few non-blended 16bpp/32bpp formats 
Fixed formats:
* R16_SFLOAT
* R16G16_SFLOAT
* R5G5B5A1_UNORM
* A2B10G10R10_UINT

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39093>
 2026-01-02 16:46:20 +00:00
Samuel Pitoiset
489550d380 radv: add new drirc radv_prefer_2d_swizzle_for_3d_storage 
Because some games perform much better with 2D swizzle for 3D storage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38084>
 2026-01-02 09:54:29 +00:00
Samuel Pitoiset
ae99082f96 radv: use 2D swizzle modes for 3D CB render targets when optimal 
Much faster because CB is optimal with 2D swizzle modes. This isn't
applied for storage images because it depends on the access pattern,
and benchmark results are very different.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38084>
 2026-01-02 09:54:29 +00:00
Samuel Pitoiset
5d4afe60ff ac/surface: add RADEON_SURF_VIEW_3D_AS_2D_ARRAY 
This is only compatible with non-sparse 3D images. It will be used
to select a better swizzle mode from RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38084>
 2026-01-02 09:54:29 +00:00
Samuel Pitoiset
468c8dca18 ac/perfcounter: compute the number of block instance properly on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
3c7ea1e4ca ac/perfcounter: update configuration of many blocks on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
08f50f169b ac/perfcounter: fix the number of static instances for some blocks on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
59b35e9777 ac/perfcounter: define a distribution mode for all perf blocks on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
d03ad11e11 ac/perfcounter: move configuration for GFX11 in a separate file 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
d18dbd9804 ac/perfcounter: define new GPU blocks on GFX11+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
1672b3aa6d ac/perfcounter: fix configuration of SQ/SQ_WGP blocks on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
0bb4a6039f ac/perfcounter: remove setting unused fields for GFX12 blocks 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
7ee931b98f radv: increase the reserved CS space size for SPM 
Because there are many more instances per SPM counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39099>
 2026-01-02 09:27:20 +01:00
Samuel Pitoiset
2e63aa1191 ac/spm: prevent selecting invalid brodcast mode for SPM blocks
Some checks are pending
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We should really have a distribution mode per block.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39080>
 2026-01-02 07:18:17 +00:00
Samuel Pitoiset
ec453a10e3 ac/spm: select correct broadcasting mode for CPF/GCEA blocks 
These blocks were recently added for new performance counters in RGP 2.6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39080>
 2026-01-02 07:18:17 +00:00
Samuel Pitoiset
c8cb0f5941 ac/spm: fix GRBM broadcasting for global blocks 
They should broadcast SE and SA.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39080>
 2026-01-02 07:18:16 +00:00
Timur Kristóf
cafec8a0c4 radv/ci: Adjust expected failures list for transfer queues
Some checks are pending
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These tests now pass.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25594>
 2026-01-02 04:32:06 +00:00
Timur Kristóf
3d803d7a2e radv: Use compute copy for emulated formats 
These aren't supported by the hardware, so better to use the
compute copy implementation with these formats.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25594>
 2026-01-02 04:32:06 +00:00
Timur Kristóf
0638fa5156 radv: Use compute for transfer operations unsupported by SDMA 
For transfer queue operations that aren't supported by SDMA,
implement them with ACE (Async Compute Engine) using the pre-
existing compute copy functions.

Add a helper radv_get_pm4_cs that returns the ACE gang CS for
transfer command buffers and the main CS for graphics/compute
command buffers. Use radv_get_pm4_cs to make sure to emit the
compute commands to the correct command stream.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25594>
 2026-01-02 04:32:06 +00:00
Timur Kristóf
aa6c8b8953 radv: Add layout argument to transfer_copy_buffer_image. 
This argument will be used with gang submit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25594>
 2026-01-02 04:32:06 +00:00
Timur Kristóf
72ac874ba6 radv: Remove radv_remove_varyings. 
Not needed anymore, since we are now doing this on lowered I/O.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33928>
 2026-01-01 21:26:26 -06:00
Timur Kristóf
473ef0b6fb radv: Use nir_remove_outputs with the noop FS. 
As opposed to radv_remove_varyings, this one works fine with
mesh shaders as well.

This commit helps depth-only rendering with mesh shaders.

No Fossil DB changes.
(Possibly there are no applicable fossils in our DB.)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33928>
 2026-01-01 21:26:04 -06:00
Timur Kristóf
24e0e8980f radv: Don't call nir_link_opt_varyings anymore
Some checks are pending
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The old nir_link_opt_varyings pass is superseded by the
new nir_opt_varyings pass.

Fossil DB stats on Strix Halo (GFX11.5):

Totals from 1291 (1.62% of 79825) affected shaders:
MaxWaves: 37070 -> 37078 (+0.02%)
Instrs: 985094 -> 985326 (+0.02%); split: -0.07%, +0.09%
CodeSize: 5144668 -> 5145384 (+0.01%); split: -0.06%, +0.07%
VGPRs: 68040 -> 68160 (+0.18%); split: -0.12%, +0.30%
Latency: 7923260 -> 7921208 (-0.03%); split: -0.04%, +0.02%
InvThroughput: 1291120 -> 1291008 (-0.01%); split: -0.05%, +0.05%
VClause: 16590 -> 16580 (-0.06%)
SClause: 27360 -> 27376 (+0.06%); split: -0.08%, +0.14%
Copies: 68767 -> 69041 (+0.40%); split: -0.51%, +0.91%
Branches: 19431 -> 19449 (+0.09%)
PreSGPRs: 55679 -> 55704 (+0.04%); split: -0.01%, +0.05%
PreVGPRs: 47787 -> 47926 (+0.29%); split: -0.00%, +0.30%
VALU: 572252 -> 572489 (+0.04%); split: -0.10%, +0.14%
SALU: 139916 -> 139845 (-0.05%); split: -0.10%, +0.05%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 18:10:05 -06:00
Timur Kristóf
7ee52b7066 radv: Don't call nir_remove_unused_varyings anymore 
The nir_remove_unused_varyings pass is not necessary anymore,
because nir_opt_varyings already does the same.

Fossil DB stats on Strix Halo (GFX11.5):

Totals from 3085 (3.86% of 79825) affected shaders:
MaxWaves: 91286 -> 91290 (+0.00%)
Instrs: 1337749 -> 1335687 (-0.15%); split: -0.39%, +0.24%
CodeSize: 6625244 -> 6618148 (-0.11%); split: -0.38%, +0.27%
VGPRs: 140424 -> 140352 (-0.05%); split: -0.07%, +0.02%
Latency: 5028592 -> 5021465 (-0.14%); split: -0.26%, +0.12%
InvThroughput: 669773 -> 671718 (+0.29%); split: -0.24%, +0.53%
VClause: 24431 -> 24407 (-0.10%); split: -0.17%, +0.07%
SClause: 30114 -> 29435 (-2.25%); split: -2.28%, +0.03%
Copies: 99243 -> 101319 (+2.09%); split: -1.32%, +3.41%
Branches: 27445 -> 27599 (+0.56%)
PreSGPRs: 119444 -> 119472 (+0.02%); split: -0.67%, +0.69%
PreVGPRs: 96667 -> 96688 (+0.02%); split: -0.00%, +0.02%
VALU: 741846 -> 744017 (+0.29%); split: -0.14%, +0.44%
SALU: 197068 -> 195256 (-0.92%); split: -0.96%, +0.05%
VMEM: 54067 -> 54053 (-0.03%); split: -0.03%, +0.00%
SMEM: 56565 -> 55131 (-2.54%); split: -2.59%, +0.05%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 18:03:22 -06:00
Timur Kristóf
43496a6bf9 radv: Don't call nir_compact_varyings anymore 
nir_compact_varyings is not necessary anymore, because everything
that it does, is also done by nir_opt_varyings.

The resulting shader stats are slightly negative because
without nir_compact_varyings, the I/O variables in TCS
are sorted less "fortunately".

After discussing this with the RADV team, we decided that
this is an acceptable loss.

Fossil DB stats on Strix Halo (GFX11.5):

Totals from 4577 (5.73% of 79825) affected shaders:
MaxWaves: 130456 -> 130532 (+0.06%); split: +0.06%, -0.00%
Instrs: 3012724 -> 3014809 (+0.07%); split: -0.06%, +0.13%
CodeSize: 15476368 -> 15484724 (+0.05%); split: -0.05%, +0.10%
VGPRs: 227976 -> 227832 (-0.06%); split: -0.14%, +0.07%
Latency: 13230769 -> 13237431 (+0.05%); split: -0.03%, +0.08%
InvThroughput: 1862029 -> 1864167 (+0.11%); split: -0.07%, +0.19%
VClause: 43128 -> 43123 (-0.01%); split: -0.08%, +0.07%
SClause: 61636 -> 61647 (+0.02%); split: -0.01%, +0.02%
Copies: 178023 -> 180309 (+1.28%); split: -0.80%, +2.09%
PreSGPRs: 195628 -> 195683 (+0.03%)
PreVGPRs: 161817 -> 161749 (-0.04%)
VALU: 1828727 -> 1831037 (+0.13%); split: -0.08%, +0.20%
SALU: 336688 -> 336668 (-0.01%); split: -0.01%, +0.00%
VMEM: 99441 -> 99545 (+0.10%); split: -0.00%, +0.11%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 18:01:34 -06:00
Timur Kristóf
e2fabb4e4a radv: Don't call nir_opt_combine_stores anymore 
Also no need for nir_lower_tess_level_array_vars_to_vec.
These should be now handled by nir_opt_vectorize_io.

Fossil DB stats on Strix Halo (GFX11.5):

Totals from 373 (0.47% of 79825) affected shaders:
Instrs: 381930 -> 380786 (-0.30%); split: -0.30%, +0.00%
CodeSize: 1888160 -> 1883644 (-0.24%); split: -0.24%, +0.01%
Latency: 1008755 -> 1008053 (-0.07%); split: -0.08%, +0.01%
InvThroughput: 156523 -> 155275 (-0.80%); split: -0.81%, +0.01%
Copies: 22357 -> 20812 (-6.91%); split: -6.93%, +0.02%
VALU: 240904 -> 239359 (-0.64%); split: -0.64%, +0.00%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 17:59:48 -06:00
Timur Kristóf
1106b0a1e2 radv: Only run some optimizations when scalarization made progress 
These passes are called to clean up after scalarization, so
only call them when scalarization actually made progress.

No Fossil DB changes on Strix Halo (GFX11.5)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 17:54:55 -06:00
Timur Kristóf
58020fdc01 radv: Scalarize and re-vectorize unlinked shader I/O 
Reasons to do this:
- Optimize VS inputs (always unlinked)
- Allow some optimization on unlinked shaders for GPL/ESO
- Prepare for retiring the old linking passes

Fossil DB stats on Strix Halo (GFX11.5):

Totals from 1814 (2.27% of 79825) affected shaders:
MaxWaves: 51232 -> 51434 (+0.39%)
Instrs: 1213430 -> 1212744 (-0.06%); split: -0.20%, +0.14%
CodeSize: 6124996 -> 6122472 (-0.04%); split: -0.17%, +0.13%
VGPRs: 93336 -> 92988 (-0.37%); split: -0.45%, +0.08%
Latency: 5360820 -> 5357501 (-0.06%); split: -0.29%, +0.23%
InvThroughput: 763087 -> 762937 (-0.02%); split: -0.11%, +0.09%
VClause: 22037 -> 22059 (+0.10%); split: -0.19%, +0.29%
SClause: 30971 -> 30884 (-0.28%); split: -0.46%, +0.17%
Copies: 73139 -> 73294 (+0.21%); split: -0.82%, +1.03%
Branches: 20370 -> 20346 (-0.12%)
PreSGPRs: 77373 -> 77404 (+0.04%)
PreVGPRs: 68218 -> 67093 (-1.65%); split: -1.78%, +0.13%
VALU: 662849 -> 663059 (+0.03%); split: -0.09%, +0.12%
SALU: 206745 -> 206781 (+0.02%); split: -0.06%, +0.08%
VMEM: 34230 -> 34250 (+0.06%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 17:54:31 -06:00
Timur Kristóf
8e6bff4caa radv: Lower 64-bit VS inputs to 32-bit 
In RADV, we already lower all 64-bit I/O to 32-bit,
except VS inputs. Most of the newer NIR passes that
deal with I/O do not support 64-bit I/O, so now it's
time for us to also lower 64-bit VS inputs to 32-bit.

No Fossil DB changes on Strix Halo (GFX11.5).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33979>
 2026-01-01 17:44:40 -06:00