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ac/surface: add RADEON_SURF_VIEW_3D_AS_2D_ARRAY

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This is only compatible with non-sparse 3D images. It will be used
to select a better swizzle mode from RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38084>
This commit is contained in:
Samuel Pitoiset 2025-10-27 16:32:42 +01:00 • committed by Marge Bot
parent 468c8dca18
commit 5d4afe60ff
2 changed files with 10 additions and 0 deletions
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9
src/amd/common/ac_surface.c
View file

@ -1533,6 +1533,9 @@ static int gfx6_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
if (!modes[i].supported)
continue;
if (modes[i].align_depth > 1 && surf->flags & RADEON_SURF_VIEW_3D_AS_2D_ARRAY)
continue;
uint64_t size = ac_estimate_size(config, surf->blk_w, surf->blk_h, surf->bpe * 8,
config->info.width, config->info.height,
modes[i].align_width, modes[i].align_height,
@ -2700,6 +2703,9 @@ static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
AddrSurfInfoIn.flags.prt = (surf->flags & RADEON_SURF_PRT) != 0 &&
(config->info.samples <= 1 || info->gfx_level < GFX10) &&
is_color_surface;
/* Only compatible with non-sparse because 3D sparse requires 3D tiling. */
AddrSurfInfoIn.flags.view3dAs2dArray = !AddrSurfInfoIn.flags.prt &&
(surf->flags & RADEON_SURF_VIEW_3D_AS_2D_ARRAY) != 0;
AddrSurfInfoIn.numMipLevels = config->info.levels;
AddrSurfInfoIn.numSamples = MAX2(1, config->info.samples);
@ -3491,6 +3497,9 @@ static bool gfx12_compute_surface(struct ac_addrlib *addrlib, const struct radeo
AddrSurfInfoIn.flags.blockCompressed = compressed;
AddrSurfInfoIn.flags.isVrsImage = !!(surf->flags & RADEON_SURF_VRS_RATE);
AddrSurfInfoIn.flags.standardPrt = !!(surf->flags & RADEON_SURF_PRT);
/* Only compatible with non-sparse because 3D sparse requires 3D tiling. */
AddrSurfInfoIn.flags.view3dAs2dArray = !AddrSurfInfoIn.flags.standardPrt &&
(surf->flags & RADEON_SURF_VIEW_3D_AS_2D_ARRAY) != 0;
if (config->is_3d)
AddrSurfInfoIn.resourceType = ADDR_RSRC_TEX_3D;

1
src/amd/common/ac_surface.h
View file

@ -79,6 +79,7 @@ enum radeon_micro_mode
#define RADEON_SURF_ENCODE_SRC (1ull << 41)
#define RADEON_SURF_ALIASED (1ull << 42)
#define RADEON_SURF_REPLAYABLE (1ull << 43)
#define RADEON_SURF_VIEW_3D_AS_2D_ARRAY (1ull << 44)
struct legacy_surf_level {
uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */