Commit graph

7116 commits

Author SHA1 Message Date
Tapani Pälli
811bf72f9f intel/blorp: fix a compile warning about uninitialized use
warning: ‘bind_offset’ may be used uninitialized in this function

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13190>
2021-10-05 11:59:27 +00:00
Lionel Landwerlin
5d7ab9ea6a anv: remove redundant VertexURBEntryReadLength setting
We're setting the same field a dozen lines below to the exact same
value.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13169>
2021-10-05 10:30:51 +00:00
Marcin Ślusarz
338955b53c anv: preserve all metadata when anv_nir_lower_multiview doesn't make progress
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
6e0c38567f anv: use nir_shader_instructions_pass in anv_nir_lower_ycbcr_textures
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
8c592e386a anv: use nir_shader_instructions_pass in anv_nir_add_base_work_group_id
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
1faebd0936 intel/compiler: use nir_metadata_none instead of its value
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
71bec85db0 intel/compiler: use nir_shader_instructions_pass in brw_nir_opt_peephole_ffma
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
9e6acd801d intel/compiler: use nir_shader_instructions_pass in brw_nir_lower_storage_image
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
10a33b046e intel/compiler: use nir_shader_instructions_pass in brw_nir_lower_scoped_barriers
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
3d0332eb12 intel/compiler: use nir_shader_instructions_pass in brw_nir_lower_mem_access_bit_sizes
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
183987d438 intel/compiler: use nir_shader_instructions_pass in brw_nir_lower_conversions
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
5b8c993d50 intel/compiler: use nir_shader_instructions_pass in brw_nir_clamp_image_1d_2d_array_sizes
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Marcin Ślusarz
9e22e0838a intel/compiler: use nir_shader_instructions_pass in brw_nir_demote_sample_qualifiers
Changes:
- nir_metadata_preserve(..., nir_metadata_block_index | nir_metadata_dominance)
  is called only when pass makes progress
- nir_metadata_preserve(..., nir_metadata_all) is called when pass doesn't
  make progress
- pass returns true ONLY when it makes progress ("progress" was initialized incorrectly)

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13189>
2021-10-05 10:02:54 +00:00
Lionel Landwerlin
4e4560ab6f intel/compiler: add missing line returns to logs
In the upcoming intel_clc tool, we're allowing to print these messages
out and some of them just don't look right.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13165>
2021-10-05 07:31:52 +00:00
Lionel Landwerlin
710393b3aa anv: enable UBO indexing
We added support but didn't expose it through the API.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b704d03efd ("anv: Do UBO loads with global addresses for bindless")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5426
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13097>
2021-10-05 07:16:49 +00:00
Caio Marcelo de Oliveira Filho
1a20cfb7d6 anv: Identify code paths specific to graphics primitive pipeline
In preparation for adding support for the graphics mesh pipeline,
identify all the paths that are specific the primitive pipeline.

This shouldn't change any behavior since the code currently only
supports the primitive pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>
2021-10-04 18:55:56 +00:00
Caio Marcelo de Oliveira Filho
a63aa9ad41 anv: Move together primitive pipeline emit calls
Just moving code and the packet order, no functional change expected.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>
2021-10-04 18:55:56 +00:00
Marcin Ślusarz
1f1ad5a9b4 anv: Use input assembly state only when pipeline has vertex stage
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>
2021-10-04 18:55:56 +00:00
Marcin Ślusarz
d79c518a32 anv: Set graphics pipeline active_stages earlier
So that we can use the active_stages in copy_non_dynamic_state() later.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>
2021-10-04 18:55:56 +00:00
Caio Marcelo de Oliveira Filho
bc2545fc57 anv: Validate vertex related states only when VS is present
Mesh pipeline doesn't use those states, so we can't assert them
unconditionally for a graphics pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13047>
2021-10-04 18:55:56 +00:00
Lionel Landwerlin
9667539b96 anv: honor INTEL_DEBUG=sync
Useful debug option for hangs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13161>
2021-10-03 11:01:18 +00:00
Mike Blumenkrantz
2f7ea2c493 anv: support EXT_primitive_topology_list_restart
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12628>
2021-10-01 21:49:26 +00:00
Tapani Pälli
69e82462a1 anv: remove feature checks from device creation
This is already handled by vk_device_init(); drivers no longer
need to do it themselves.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12867>
2021-10-01 17:37:02 +00:00
Tapani Pälli
8cc4e0b0c4 anv: remove a format assert when setting up attachments
There are exceptions in spec where the framebuffer image format and
format given for render pass attachment may differ. This happens in
particular when subpass has resolve attachment that might resolve
only depth from a combined depth+stencil format. There the formats do
not need to match but be 'compatible' with each other.

As example using VK_FORMAT_D32_SFLOAT format is considered compatible
when actual framebuffer format is VK_FORMAT_D32_SFLOAT_S8_UINT.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13082>
2021-10-01 09:59:32 +00:00
Marcin Ślusarz
1d1cd2ee77 anv: drop redundant unlikely's around INTEL_DEBUG
They are not needed since 4015e1876a.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13115>
2021-10-01 07:57:20 +00:00
Marcin Ślusarz
6229d40fbf intel/compiler: drop redundant likely's around INTEL_DEBUG
They are not needed since 4015e1876a.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13115>
2021-10-01 07:57:20 +00:00
Jordan Justen
51338a1177 anv/slice_hash: Don't allocate more than once with multiple queues
emit_slice_hashing_state gets called once per queue, meaning
device->slice_hash can get allocated multiple times. This can be
reproduced by setting the env-var ANV_QUEUE_OVERRIDE=gc=2.

Reworks:
 * Only pack the struct once (s-b Lionel, Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13114>
2021-09-30 18:21:51 +00:00
Jordan Justen
6ce3bb1354 anv/blorp: Force compute blorp on compute-only queues
Reworks:
 * Set BLORP_BATCH_USE_COMPUTE in anv_blorp_batch_init (s-b Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
136672154c anv/blorp: Add anv_blorp_batch_init, anv_blorp_batch_finish
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
15a6018d06 anv/blorp: Select pipeline based on BLORP_BATCH_USE_COMPUTE
Reworks:
 * Let blorp_clear handle DEBUG_BLOCS
 * Old subject was: "Use compute blorp for vkCmdFillBuffer with
   INTEL_DEBUG=blocs"
 * Old subject was: "anv/blorp: Support params.cs_prog_data being set"

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
7599533658 anv/blorp: Make sure blorp type is supported by the queue
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
7a4f945351 anv: Prevent starting a render pass on compute queues
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
075db10a32 anv: Store anv_queue_family type in cmd-pool
v2 (Jason Ekstrand):
 - Use an anv_queue_family pointer

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
06691131e9 intel/blorp: Support some image/buffer blit operations using compute
Reworks:
 * Use BLORP_BATCH_USE_COMPUTE flag rather than compute param to
   blorp_copy (s-b Jason)
 * Squash "intel/blorp: Set shader_pipeline for compute"
 * Squash "intel/blorp: Add blorp_copy_supports_compute function"
 * Squash "intel: Support compute for image/buffer copy if INTEL_DEBUG=blocs
           is set"
 * Squash "intel/blorp: Support compute for some blit operations"
 * Use nir_image_store (s-b Jason)
 * Use nir_push_if (s-b Jason)
 * Require gfx12 for ccs in blorp_copy_supports_compute (s-b Jason)
 * Add nir_pop_if (s-b Ken)
 * Fix aux_usage check on gfx12 blorp_copy_supports_compute (s-b Ken)
 * Use blorp_set_cs_dims (s-b Jason)
 * Use dim=2d with array=true for nir_image_store (s-b Jason, Francisco)
 * Restructure gen checks in blorp_copy_supports_compute (s-b Ken)
 * Use nir_load_global_invocation_id (s-b Jason)
 * Fix inefficient calculation of store_pos (s-b Jason)
 * Use bounds_if being NULL/non-NULL for nir_pop_if (s-b Jason)
 * discard => bounds (s-b Ken)
 * Re-add ISL_AUX_USAGE_CCS_E in *_supports_compute (s-b Sagar)
 * Skip duplicated in_bounds calculation (s-b Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
71c4937833 intel/blorp/blit: Rename wm_prog_key and prog_key to key
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
22ecb4a10f intel/blorp: Support compute for slow clears
Reworks:
 * Use BLORP_BATCH_USE_COMPUTE flag rather than compute param to
   blorp_clear (s-b Jason)
 * Use nir_load_global_invocation_id (s-b Jason)
 * Use nir_push_if (s-b Jason)
 * Use nir_image_store (s-b Jason)
 * Require gfx12 for ccs in blorp_clear_supports_compute (s-b Jason)
 * Add nir_pop_if (s-b Ken)
 * Fix aux_usage check on gfx12 blorp_clear_supports_compute (s-b Ken)
 * Use blorp_set_cs_dims (s-b Jason)
 * Simplify rgb-as-red calculation (s-b Jason)
 * Use dim=2d with array=true for nir_image_store (s-b Jason, Francisco)
 * discard => bounds (s-b Ken)
 * Re-add ISL_AUX_USAGE_CCS_E in *_supports_compute (s-b Sagar)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
2123d59693 intel/blorp: Convert blorp_clear color_write_disable to a bitmask
Reworks:
 * Various cleanups adding BITFIELD_* (s-b Jason)
 * Add /* color_write_disable */ comment (s-b Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
00ea664cb6 blorp/clear: Simplify rbg-as-red channel packing
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
44ba094b1d blorp: Set view usage to ISL_SURF_USAGE_STORAGE_BIT for compute
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
dd35b9fa34 intel/blorp: Use blorp_check_in_bounds for discards
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
c8c2c30f5d intel/blorp: Add blorp_check_in_bounds()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
1448e019d6 intel/blorp: Change discard terminology to bounds
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
9e9481699d intel/blorp: Add blorp_get_cs_local_y, blorp_set_cs_dims
Based the blorp_params, blorp_get_cs_local_y returns a recommended
local_y size for a compute shader.

blorp_set_cs_dims sets the compute program dims based on a given
local_y size.

Reworks:
 * Add blorp_set_cs_dims (s-b Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
72e04a6248 intel/gfx7: Change GPGPU Mode to bool
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
90a39cac87 intel/blorp: Emit compute program based on BLORP_BATCH_USE_COMPUTE
Reworks:
 * Don't pack params, just memcpy param struct (s-b Jason)
 * Old subject: "intel/blorp: Emit compute program if
   params.cs_prog_data is set"
 * Various cleanups of push-const size/alignment (s-b Jason)
 * Fix subslice count by moving to devinfo (s-b Ken)
 * Simplify cw.InterfaceDescriptor code (s-b Ken)
 * Drop some comments from i965 (s-b Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jason Ekstrand
3e13c4ccf2 anv,iris,genxml: Use NumberOfBarriers on XeHP
Ref: bspec 55400
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
a4c9c242ed blorp: Add blorp_alloc_general_state
Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
90feddf38a intel/blorp: Split out surface setup from state emission
Render will use blorp_setup_binding_table and blorp_emit_btp, but
compute will only use blorp_setup_binding_table.

Rework:
 * Use blorp_setup_binding_table, blorp_emit_btp (s-b Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
b704c9a75b intel/blorp: Split out ps specific sampler state into a separate function
The compute path will use blorp_emit_sampler_state, whereas the render
path will use blorp_emit_sampler_state_ps.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00
Jordan Justen
dbd4934441 intel/blorp: Add blorp_compile_cs
Reworks:
 * Don't pack params (s-b Jason)
 * Drop nir_remove_dead_variables (s-b Jason)
 * Fix comment s/render target/destination image/ (s-b Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
2021-09-30 17:41:33 +00:00