mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-26 17:10:11 +01:00
intel/compiler: add missing line returns to logs
In the upcoming intel_clc tool, we're allowing to print these messages out and some of them just don't look right. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13165>
This commit is contained in:
parent
710393b3aa
commit
4e4560ab6f
3 changed files with 8 additions and 8 deletions
|
|
@ -716,7 +716,7 @@ fs_visitor::limit_dispatch_width(unsigned n, const char *msg)
|
|||
} else {
|
||||
max_dispatch_width = MIN2(max_dispatch_width, n);
|
||||
brw_shader_perf_log(compiler, log_data,
|
||||
"Shader dispatch width limited to SIMD%d: %s",
|
||||
"Shader dispatch width limited to SIMD%d: %s\n",
|
||||
n, msg);
|
||||
}
|
||||
}
|
||||
|
|
@ -9810,7 +9810,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
|
|||
v16->import_uniforms(v8);
|
||||
if (!v16->run_fs(allow_spilling, params->use_rep_send)) {
|
||||
brw_shader_perf_log(compiler, params->log_data,
|
||||
"SIMD16 shader failed to compile: %s",
|
||||
"SIMD16 shader failed to compile: %s\n",
|
||||
v16->fail_msg);
|
||||
} else {
|
||||
simd16_cfg = v16->cfg;
|
||||
|
|
@ -9838,7 +9838,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
|
|||
v32->import_uniforms(v8);
|
||||
if (!v32->run_fs(allow_spilling, false)) {
|
||||
brw_shader_perf_log(compiler, params->log_data,
|
||||
"SIMD32 shader failed to compile: %s",
|
||||
"SIMD32 shader failed to compile: %s\n",
|
||||
v32->fail_msg);
|
||||
} else {
|
||||
const performance &perf = v32->performance_analysis.require();
|
||||
|
|
@ -10212,7 +10212,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
|
|||
const bool allow_spilling = generate_all || v == NULL;
|
||||
if (!v16->run_cs(allow_spilling)) {
|
||||
brw_shader_perf_log(compiler, params->log_data,
|
||||
"SIMD16 shader failed to compile: %s",
|
||||
"SIMD16 shader failed to compile: %s\n",
|
||||
v16->fail_msg);
|
||||
if (!v) {
|
||||
assert(v8 == NULL);
|
||||
|
|
@ -10260,7 +10260,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
|
|||
const bool allow_spilling = generate_all || v == NULL;
|
||||
if (!v32->run_cs(allow_spilling)) {
|
||||
brw_shader_perf_log(compiler, params->log_data,
|
||||
"SIMD32 shader failed to compile: %s",
|
||||
"SIMD32 shader failed to compile: %s\n",
|
||||
v32->fail_msg);
|
||||
if (!v) {
|
||||
assert(v8 == NULL);
|
||||
|
|
@ -10456,7 +10456,7 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data,
|
|||
const bool allow_spilling = (v == NULL);
|
||||
if (!v16->run_bs(allow_spilling)) {
|
||||
brw_shader_perf_log(compiler, log_data,
|
||||
"SIMD16 shader failed to compile: %s",
|
||||
"SIMD16 shader failed to compile: %s\n",
|
||||
v16->fail_msg);
|
||||
if (v == NULL) {
|
||||
assert(v8 == NULL);
|
||||
|
|
|
|||
|
|
@ -2804,7 +2804,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
|
|||
"%d:%d spills:fills, %u sends, "
|
||||
"scheduled with mode %s, "
|
||||
"Promoted %u constants, "
|
||||
"compacted %d to %d bytes.",
|
||||
"compacted %d to %d bytes.\n",
|
||||
_mesa_shader_stage_to_abbrev(stage),
|
||||
dispatch_width, before_size / 16 - nop_count,
|
||||
loop_count, perf.latency,
|
||||
|
|
|
|||
|
|
@ -2266,7 +2266,7 @@ generate_code(struct brw_codegen *p,
|
|||
brw_shader_debug_log(compiler, log_data,
|
||||
"%s vec4 shader: %d inst, %d loops, %u cycles, "
|
||||
"%d:%d spills:fills, %u sends, "
|
||||
"compacted %d to %d bytes.",
|
||||
"compacted %d to %d bytes.\n",
|
||||
stage_abbrev, before_size / 16,
|
||||
loop_count, perf.latency, spill_count,
|
||||
fill_count, send_count, before_size, after_size);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue