Like with the sample qualifier on all GPUs, use pixel on older HW when
MSAA rasterization is disabled to get reliable results. Since I ran many
CI jobs on this, this updates the A530 TF flakes list, though I don't
think that this MR necessarily made it flakier (we were already struggling
on a5xx TF, which was what was motivating me to look at this!)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9641>
After some research, I found out that the alignment needs to be set
on the return value of the load, rather than on the pointer.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Fixes: 14ad82b4e9 "ac/llvm: Emit more efficient code for load_shared."
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9688>
Switch from the old piglit to the new piglit-runner executor.
Acked-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9680>
MSVC warns (loudly) about a mismatch between the generated functions in
u_format_table.c and the definition of util_format_[un]pack_description,
specifically having 'restrict' in the function but not in the pointer
type in the struct.
So, add 'restrict' everywhere - to the function types, and to the rest
of the implementations that are assigned to those structs.
v2: util_format_unpack_description is used in gallium/auxiliary/translate
Fixes: 5785fdac ("u_format: Mark the generated pack/unpack src/dst args as restrict.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9670>
this was only implemented for textures (I assume because drivers which implement
the corresponding intrinsic don't support multisampled images), but it's also
used for shader images
Fixes: 22fdb2f855 ("nir/spirv: Update to the latest revision")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9682>
If we don't reserve these, we risk these lowering passes eating up more
uniforms than we have available.
This fixes a crash due to an assert in Zink, because we end up trying to
use a too large UBO after lowering.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9631>
I think we need to care about this here as well, otherwise the variant
logic might be short-circuited.
Fixes: 7eb5fd98fd ("mesa/st: handle running nir lower passes for ucp and psiz in tess stage")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9631>
I think we need to care about this here as well, otherwise the variant
logic might be short-circuited.
Fixes: ad0037fcfe ("mesa/st: set lower_point_size for tes/gs during program update")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9631>
nir_to_tgsi utiliy was using wrong src for nir_op_fcsel.
Fixes regression with solidworks2012_viewport.trace and mudbox-2010sp1-basic-head.trace
v2: as per suggested by Brian, instead of relying assumption that
value will be 0.0 or 1.0 all the time, use -abs(src) to make any non-zero
value as negative.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9658>
If the driver can't do it, we shouldn't be putting it in the TGSI,
regardless of what the NIR compiler above us decided.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9662>
I'll be rewriting how resource tracking works, so abstracting it and removing
direct uses is going to reduce the chances of breaking things as well as code churn
plus it's a bit easier to use
downside is that until that rewrite happens, this will be a (very small) perf hit and
there's some kinda gross macros involved to consolidate code
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9626>
new_draw has updated draw count. Stale info in draw caused regression
with piglit gl-3.0-multidrawarrays-vertexid -indirect
fixes piglit test ./gl-3.0-multidrawarrays-vertexid -indirect
Fixes: 1cd455b17b ("gallium: extend draw_vbo to support multi draws")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9656>
Since states were not updated in fast path for restoring light attributes,
seen darker images in solidworks2012_viewprt.trace
Fixes regression seen with solidworks2012_viewport.trace
Fixes: 7fa9d9d06c ("mesa: add a fast path for restoring light attributes")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9657>
Anvil can handle if this call fails, but not if we assert. :)
Reported-by: Brian Paul <brianp@vmware.com>
Fixes: 5d84c764fd ("anv: Gather engine info from i915 if available")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9664>
The messages for those 16-bit operations still use 32-bit sources and
destinations, so expand them accordingly when building the payload.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8750>
If we load constant data using pull constant SENDS, and we later load
that register with some other data, we can end up in a situation where
we don't track the initial fixed register write and therefore end up
using uninitialized registers.
This tracks write-on-write of fixed GRFs like we do for normal virtual
GRFs.
v2: Fix post_alloc_reg case (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9667>
