Commit graph

89575 commits

Author SHA1 Message Date
Eric Anholt
3be820477f broadcom/vc5: Move stencil state packing to the CSO.
Only the stencil ref comes in as dynamic state at emit time.
2017-11-07 09:19:48 -08:00
Eric Anholt
3da39f2297 broadcom/vc5: Introduce a helper for pre-packing our V3DXX structs.
This is so much more pleasant to write than the manual
V3D33_whatever_pack() calls, and will be useful for when we start doing
actual per-V3D compiles.
2017-11-07 09:19:48 -08:00
Eric Anholt
078b163a9c broadcom/vc5: Add a cl_emit() variant for merging with a pre-packed struct.
Cleans up the hand-written code, at the cost of another ugly macro.
2017-11-07 09:19:48 -08:00
Eric Anholt
735b844b1b broadcom/vc5: Skip emitting depth offset while disabled.
The enable flag is also in the rasterizer state, so it will be emitted
once it's needed.
2017-11-07 09:19:48 -08:00
Eric Anholt
386e9362a5 broadcom/vc5: Don't emit stencil config if not doing stencil test.
As with blending, we'll have the bit flagged again when it gets reenabled
in CONFIGURATION_BITS, so there's no need to emit test state if we're not
testing.
2017-11-07 09:19:48 -08:00
Eric Anholt
f90ee6eb2b broadcom/vc5: Don't emit updated blend factors/funcs while disabled.
The dirty bit will be flagged again when re-enbaled.  Keeps us from
emitting blend state in CLs that never do blending.
2017-11-07 09:19:48 -08:00
Eric Anholt
dd429cb2db broadcom/vc5: Fix missing enum decode for indexed primitives. 2017-11-07 09:19:48 -08:00
Eric Anholt
bb6997e6a3 broadcom/vc5: Drop padding bits from the bottom of the TSDA address.
Fixes misaligned-looking addresses in decode.
2017-11-07 09:19:48 -08:00
Eric Anholt
949ac638bc broadcom/vc5: Make sure the TMU indirect struct is appropriately aligned.
I was hoping that this would help with fbo-generatemipmap hangs, but no
luck.
2017-11-07 09:19:48 -08:00
Kenneth Graunke
cb47de4ff0 broadcom/genxml: Fix decoding of groups with small fields.
Groups containing fields smaller than a byte probably not being decoded
correctly.  For example:

    <group count="32" start="32" size="4">
      <field name="Vertex Element Enables" start="0" end="3" type="uint"/>
    </group>

gen_field_iterator_next would properly walk over each element of the
array, incrementing group_iter.  However, the code to print the actual
values only considered iter->field->start/end, which are 0 and 3 in the
above example.  So it would always fetch bits 3:0 of the current byte,
printing the same value over and over.

Cc: Eric Anholt <eric@anholt.net>
2017-11-07 09:19:48 -08:00
Eric Anholt
47dac5d2bc broadcom/vc5: Use DEPTH24_STENCIL8 for rendering to depth-only textures.
The HW puts the pad bits at the top for DEPTH_COMPONENT24, but we need it
at the bottom for texturing.  Using the format with stencil probably means
we won't be able to do Z24 and separate S8, but I wasn't planning on
supporting that anyway.

Fixes hiz-depth-read-fbo-d24-s0
2017-11-07 09:19:48 -08:00
Chad Versace
3ea37d0a2a anv: Suffix anv-private 'VK' tokens with 'ANV'
I saw VK_IMAGE_ASPECT_ANY_COLOR_BIT while hacking anv_formats.c and got
confused. "Huh? What extension added that?". No extension defines it;
anv_private.h defines it.

To remove confusion, rename the anv-private VK tokens as if they were
extension tokens with the ANV vendor suffix.

I found only two such tokens:

    VK_IMAGE_ASPECT_ANY_COLOR_BIT
    VK_IMAGE_ASPECT_PLANES_BITS

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-07 09:06:41 -08:00
Chad Versace
012b54c6b1 anv: Remove unused variable 'gen'
In anv_physical_device_get_format_properties().

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-07 09:06:30 -08:00
Marek Olšák
33000e7c43 radeonsi: add si_screen::has_ls_vgpr_init_bug
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:40 +01:00
Marek Olšák
cde664ab81 radeonsi: use ac_create_target_machine
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:38 +01:00
Marek Olšák
81f81fdb54 radeonsi: use ac_get_llvm_processor_name
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:36 +01:00
Marek Olšák
c29f5fe41c radeonsi/gfx9: don't set gs_table_depth
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:33 +01:00
Marek Olšák
e616743dab radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:26:36 +01:00
Marek Olšák
24e9004708 radeonsi: remove unused field in the PCI ID table
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-07 17:26:36 +01:00
Miklós Máté
cf47dfe8f1 mesa: fix deleting the dummy ATI_fs
The DummyShader is used by GenFragmentShadersATI() as a placeholder to
mark IDs as allocated. Context cleanup wants to delete everything in
ctx->Shared->ATIShaders, and crashes on these placeholders with this
backtrace:
==15060== Invalid free() / delete / delete[] / realloc()
==15060==    at 0x482F478: free (vg_replace_malloc.c:530)
==15060==    by 0x57694F4: _mesa_delete_ati_fragment_shader (atifragshader.c:68)
==15060==    by 0x58B33AB: delete_fragshader_cb (shared.c:208)
==15060==    by 0x5838836: _mesa_HashDeleteAll (hash.c:295)
==15060==    by 0x58B365F: free_shared_state (shared.c:377)
==15060==    by 0x58B3BC2: _mesa_reference_shared_state (shared.c:469)
==15060==    by 0x578687F: _mesa_free_context_data (context.c:1366)
==15060==    by 0x595E9EC: st_destroy_context (st_context.c:642)
==15060==    by 0x5987057: st_context_destroy (st_manager.c:772)
==15060==    by 0x5B018B6: dri_destroy_context (dri_context.c:217)
==15060==    by 0x5B006D3: driDestroyContext (dri_util.c:511)
==15060==    by 0x4A1CBE6: dri3_destroy_context (dri3_glx.c:170)
==15060==  Address 0x7b5dae0 is 0 bytes inside data symbol "DummyShader"

Also, DeleteFragmentShadersATI() should not assert on DummyShader, just
remove the hash entry.

Normally one would define a shader after GenFragmentShadersATI(), and
BindFragmentShaderATI() replaces the placeholder with a real object.
However, the specification doesn't say that one has to define a shader
for each allocated ID.

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-11-07 17:26:36 +01:00
Michel Dänzer
cd3b55ad07 gallium: Guard assertions by NDEBUG instead of DEBUG
This matches the standard assert.h header.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-07 16:47:15 +01:00
Eric Engestrom
cc15460e18 meson: drop GLESv1 .so version back to 1.0.0
autotools generates libGLESv1_CM.so.1.0.0, so let's make sure meson
does the same.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-07 10:47:20 +00:00
Eric Engestrom
5be1b1a8ce meson: standardize .so version to major.minor.patch
This `version` field defines the filename for the .so.
The plan .so as well as .so.$major are always symlinks to this.

Unless I'm mistaken, only the major is ever used, so this shouldn't
matter, but for consistency with autotools (and in case it does matter),
let's always have all 3 major.minor.patch components.

(The soname isn't affected, and is always .so.$major)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-07 10:47:20 +00:00
Dave Airlie
0084f4a422 ac/nir: for ubo load use correct num_components
I was hacking something stupid in doom, and hit an assert for the bitcast
following this, it definitely looks like this should be the number of 32-bit
components, not the instr level ones.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-07 14:54:19 +10:00
Gwan-gyeong Mun
fb87c40a58 nir: fix a typo
Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-06 18:11:24 -08:00
Tomasz Figa
0886be093f glsl: Allow precision mismatch on dead data with GLSL ES 1.00
Commit 259fc50545 added linker error for
mismatching uniform precision, as required by GLES 3.0 specification and
conformance test-suite.

Several Android applications, including Forge of Empires, have shaders
which violate this rule, on a dead varying that will be eliminated.
The problem affects a big number of applications using Cocos2D engine
and other GLES implementations accept this, this poses a serious
application compatibility issue.

Starting from GLSL ES 3.0, declarations with conflicting precision
qualifiers are explicitly prohibited. However GLSL ES 1.00 does not
clearly specify the behavior, except that

  "Uniforms are defined to behave as if they are using the same storage in
  the vertex and fragment processors and may be implemented this way.
  If uniforms are used in both the vertex and fragment shaders, developers
  should be warned if the precisions are different. Conversion of
  precision should never be implicit."

The word "used" is not clear in this context and might refer to
 1) declared (same as GLES 3.x)
 2) referred after post-processing, or
 3) linked after all optimizations are done.

Looking at existing applications, 2) or 3) seems to be widely adopted.
To avoid compatibility issues, turn the error into a warning if GLSL ES
version is lower than 3.0 and the data is dead in at least one of the
shaders.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97532
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-11-06 15:16:03 -08:00
Timothy Arceri
a9000cb860 i965: disable NIR linking on HSW and below
Fixes: 379b24a40d "i965: make use of nir linking"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103537
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 09:14:05 +11:00
Dave Airlie
201b3b8d0d radv: move is_local up to the winsys level.
We can avoid adding the buffer in the non-local case, this will
avoid all the overhead of the indirect call.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:45:59 +00:00
Dave Airlie
25660499b6 radv: wrap cs_add_buffer in an inline. (v2)
The next patch will try and avoid calling the indirect function.

v2: add a missing conversion.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:45:59 +00:00
Dave Airlie
31b5da7958 radv: when loading regs no need to add buffer
The function that calls us has just added the buffer to the
list already, no need to try and add it again.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:44:49 +00:00
Dave Airlie
3bf8be41b8 radv: pre-calculate user_data_0 registers and store in pipeline
There's no point recalculating these the whole time on descriptor
emission, just store them at pipeline creation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:44:49 +00:00
Neil Roberts
6ce9006d76 i965: Enable flush control
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:03 -05:00
Adam Jackson
791d06b23b drisw: Enable flush control for llvmpipe and softpipe
Hilariously this is a fairly big win.  Neil's multi-context-test
improves from ~24 to ~36 fps with llvmpipe on a Core i5-3317U.  softpipe
also improves, from about 2.25 to 3.09 fps (when it's that slow, you're
allowed to be that precise).

I'd have added it to swrast classic, but the testcase wants GL 3.0 and
shaders, and that's not a thing classic has, so I figured making it work
on softpipe was crime enough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Adam Jackson
5cc06bec19 gallium: Wire up flush control
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Adam Jackson
c0be3aae6c egl: Implement EGL_KHR_context_flush_control
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Neil Roberts
ba7679f48d glx: Implement GLX_ARB_context_flush_control
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:02 -05:00
Neil Roberts
b89067c84f dri: Add a flush control extension
This advertises that the driver can accept a new context attribute
__DRI_CTX_ATTRIB_RELEASE_BEHAVIOR.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:02 -05:00
Neil Roberts
6d87500fe1 dri: Change __DriverApiRec::CreateContext to take a struct for attribs
Previously the CreateContext method of __DriverApiRec took a set of
arguments to describe the attribute values from the window system API's
CreateContextAttribs function. As more attributes get added this could
quickly get unworkable and every new attribute needs a modification for
every driver.

To fix that, pass the attribute values in a struct instead.  The struct
has a bitmask to specify which members are used. The first three members
(two for the GL version and one for the flags) are always set. If the
bit is not set in the attribute mask then it can be assumed the
attribute has the default value. Drivers will error if unknown bits in
the mask are set.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:02 -05:00
Neil Roberts
8c0729fd99 intel: Don't flush the old context in intelMakeCurrent
It shouldn't be necessary to flush the context within the driver
implementation because the old context is explicitly flushed in
_mesa_make_current which is called a little further on. It is useful to
only have a single place that flushes when switching contexts to make it
easier to later implement the GL_KHR_context_flush_control extension.

The flush in intelMakeCurrent was added in commit 5505865 to implement
the GLX semantics that the context should be flushed when it is
released.  When the commit was made there was no flush in
_mesa_make_current because it was only added later in 93102b4c. I think
that later commit effectively makes the first commit redundant.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:08:58 -05:00
Adam Jackson
9ef7158a09 egl/dri2: Factor out context attribute initialization
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-11-06 16:08:58 -05:00
Wladimir J. van der Laan
96463614a3 etnaviv: Don't over-pad compressed textures
HALIGN_FOUR/SIXTEEN has no meaning for compressed textures, and we can't
render to them anyway. So use the tightest possible packing. This
avoids bugs with non-power-of-two block sizes.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:31:20 +01:00
Wladimir J. van der Laan
93ba3f29bb etnaviv: ASTC texture support
Add ASTC texture support for hardware that supports this
(currently only GC3000 on i.MX6qp is known to have this).

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:30:54 +01:00
Wladimir J. van der Laan
f1e1c60ff6 etnaviv: Update from rnndb
Updated as of etnav_viv commit 3b4a8ec.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-11-06 21:29:19 +01:00
Dave Airlie
4bcb48b831 radv: add initial copy descriptor support. (v2)
It appears the latest dota2 vulkan uses this,
and we get a hang in VR mode without it.

v2: remove finishme I left in after finishing.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 19:12:39 +00:00
Marek Olšák
71f5fe36b7 gallium/u_vbuf: use signed vertex buffers offsets for optimal uploads
Uploaded data must start at (stride * start), because we can't modify
start in all cases. If it's the first allocation, it's also the amount
of memory wasted. If the starting offset is larger than the size of
the upload buffer, the buffer is re-created, used for 1 upload, and then
thrown away. If the upload is small, most of the buffer space is unused
and wasted. Keep doing that and the OOM killer comes. It's actually
pretty quick.

With signed VB offsets, we can set min_out_offset = 0
in u_upload_alloc/u_upload_data.

This fixes OOM situations with SPECviewperf.
2017-11-06 19:09:12 +01:00
Marek Olšák
3f58988b81 radeonsi: enable signed vertex buffer offsets 2017-11-06 19:09:12 +01:00
Marek Olšák
24d6318d24 gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET 2017-11-06 19:09:12 +01:00
Juan A. Suarez Romero
e17e8934f9 automake: include git_sha1.h.in in release tarball
Fixes:

make[2]: Leaving directory '/home/local/mesa/mesa-17.4.0-devel/_build/sub/src'
make[2]: *** No rule to make target '../../../src/git_sha1.h.in', needed by 'git_sha1.h'.  Stop.
Makefile:660: recipe for target 'all-recursive' failed

Fixes: 16be271c6e "git_sha1_gen: use git_sha1.h.in on all build systems"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-11-06 18:18:42 +01:00
Marek Olšák
adab7f16ff radeonsi: don't map big VRAM buffers for the first upload directly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-06 16:23:20 +01:00
Marek Olšák
4b0dc098b2 gallium/u_threaded: don't map big VRAM buffers for the first upload directly
This improves Paraview "many spheres" performance 4x along with the radeonsi
commit.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-06 16:23:20 +01:00