Commit graph

80360 commits

Author SHA1 Message Date
Jason Ekstrand
6da8149601 i965/miptree: Break miptree -> ISL tiling conversion into a helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-27 14:43:21 -07:00
Jason Ekstrand
c30b7164b7 i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offset
The only actual user of this parameter was blorp and, since the conversion
to ISL, it no longer uses this function.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-27 14:43:17 -07:00
Jason Ekstrand
4964a5149b intel/blorp: Fix a couple asserts around image copy rectangles
With dealing with rectangles in compressed images, you can have a width or
height that isn't a multiple of the corresponding compression block
dimension but only if that edge of your rectangle is on the edge of the
image.  When we call convert_to_single_slice, it creates an 2-D image and a
set of tile offsets into that image.  When detecting the right-edge and
bottom-edge cases, we weren't including the tile offsets so the assert
would misfire.  This caused crashes in a few UE4 demos

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98431
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Tested-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-10-27 13:45:39 -07:00
Jason Ekstrand
caf67bb12f anv/allocator: Assert that we have a valid gem handle in bo_pool_alloc 2016-10-27 13:45:39 -07:00
Samuel Pitoiset
84e946380b nvc0/ir: fix emission of IMAD with NEG modifiers
The emitter tried to emit sub instead of subr when src0 has
actually a NEG modifier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 12.0 13.0" <mesa-stable@lists.freedesktop.org>
2016-10-27 19:29:56 +02:00
Juan A. Suarez Romero
5d83820a1d glsl: inspect interfaces in contains_foo()
When checking if a type contains doubles, integers, samples, etc. we
check if the current type is a record or array, but not if it is an
interface.

This commit also inspects if the type is an interface.

It fixes spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/invalid-block-with-double.vert
piglit test.

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-10-27 12:36:09 +02:00
Iago Toral Quiroga
66fcfa6894 i965/vec4: make offset() work in terms of a simd width and scalar components
So that it has the same semantics as the scalar backend implementation. The
helper will now take a simd width (which is always 8 in vec4 mode) and step
as many scalar components as specified by that width, respecting the size of
the scalar channels.

v2 (Curro):
  - Remove the assertion in offset(), byte_offset() has the same checks.
  - Use byte_offset() directly instead of add_byte_offset().
  - Make things more clear by explicitly including the vertical stride
    in the byte offset expression.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-10-27 10:59:31 +02:00
Iago Toral Quiroga
ba63db1f2e i965/vec4: use byte_offset() instead of offset()
In a later patch we want to change the semantics of offset() to be in terms
of SIMD width and scalar channels so it is consistent with the definition
of the same helper in the scalar backend. However, some uses of offset()
in the vec4 backend do not operate naturally in terms of these
semantics. In these cases it is more natural to use the byte_offset() helper
instead.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-10-27 10:59:31 +02:00
Iago Toral Quiroga
5a4ce9f9a7 i965/vec4: add a byte_offset helper
v2: wrap the helper in a namespace to make clear that it is an
    implementation detail of byte_offset() and is not intended
    to be used independently (Curro).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-10-27 10:59:31 +02:00
Kenneth Graunke
173558445d glsl: Size TCS->TES unsized arrays to gl_MaxPatchVertices for queries.
SSO validation and other program interface queries want to see that
unsized (non-patch) TCS output/TES input arrays are implicitly sized
to gl_MaxPatchVertices.

By the time we create the program resource lists, we've sized the arrays
to their actual size.  (We try to create TCS output arrays to match the
output patch size right away, and at this point, we should have shrunk
TES input arrays.)  One option would be to keep them sized to
gl_MaxPatchVertices, and defer shrinking them.  But that's a big change,
and I don't think it's a good idea.

Instead, this patch introduces a new ir_variable flag which indicates
the variable is implicitly to gl_MaxPatchVertices.  Then, the linker
munges the types when creating the resource list, ignoring the size
in the IR's types.  Basically, lie about it for resource queries.
It's ugly, but I think it ought to work.

We probably could use var->data.implicit_sized_array for this, but
I opted for a separate bit to try and avoid convoluting the existing
SSBO handling.  They're similar in concept, but share none of the
same code...

Fixes:
ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
and the ES32-CTS and ESEXT-CTS variants.

v2: Add a comment (requested by Timothy, written by me).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2016-10-27 00:56:51 -07:00
Kenneth Graunke
34fd2ffed8 glsl: Pass ctx to program interface query helper functions.
The next commit will use this in add_shader_variable - this just
separates out some of the mechanical changes for easier review.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2016-10-27 00:56:34 -07:00
Tapani Pälli
2035930966 egl: set preserved behavior for surface only if config supports it
Otherwise we can end up with mismatching behavior between config and
surface when client queries surface attributes. As example, configs
for DRI3 do not support preserved behavior but here we were setting
preserved behavior for pixmap and pbuffer.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98326
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2016-10-27 07:12:51 +03:00
Tapani Pälli
671da8d8ba mesa: expose GL_EXT_robustness
Fixes 8 failing dEQP tests:
   dEQP-EGL.functional.create_context_ext.robust_gles*

(now 42 tests pass in dEQP-EGL*robust*, 0 fail and rest are skipped)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98343
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-10-27 07:06:41 +03:00
Tapani Pälli
44482d5a3e st/mesa: set RobustAccess true when is supported
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-10-27 07:06:41 +03:00
Tapani Pälli
fe764477b0 i956: set RobustAccess true when is supported
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-10-27 07:06:41 +03:00
Tapani Pälli
ef16003320 mesa: add missing CONTEXT_ROBUST_ACCESS enum
commit 85008db1d5 missed this enum
for GL_KHR_robustness implementation

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-10-27 07:06:41 +03:00
Tapani Pälli
6bf6fcfcd9 egl: fix error handling in _eglCreateSync
EGL specification requires context to be current only when sync
type matches EGL_SYNC_FENCE_KHR.

Fixes 25 failing dEQP tests:
   dEQP-EGL.functional.reusable_sync.*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98339
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-10-27 07:06:41 +03:00
Dave Airlie
ca035006c8 vulkan/wsi/x11: add support for IMMEDIATE present mode
We shouldn't be using ASYNC here, that would be used
for immediate mode, so let's implement that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-27 11:43:15 +10:00
Dave Airlie
1cdca1eb16 vulkan/wsi: store present mode in swapchain base class
This just moves this up a level as x11 will need it to
implement things properly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-27 11:43:00 +10:00
Dave Airlie
787c172aed vulkan/wsi/x11: handle timeouts properly in next image acquire (v1.1)
For 0 timeout, just poll for an event, and if none, return
For UINT64_MAX timeout, just wait for special event blocked
For other timeouts get the xcb fd and block on it, decreasing
the timeout if we get woken up for non-special events.

v1.1: return VK_TIMEOUT for poll timeouts.
handle timeout going negative.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-27 11:42:26 +10:00
Dave Airlie
d548fa882b radv/ac/llvm: trim texture return values
The intrinsic engine asserts in llvm due to this,
as we put a vec4 into a vec1, and the next instruction
isn't expecting it.

So trim the vector at the end before inserting it.

Reported-by: Christoph Haag <haagch+mesadev@frickel.club>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-27 11:42:03 +10:00
Rhys Kidd
5c73ecaac4 glsl: Add pthread libs to cache_test
Fixes the following compile error, present when the SHA1 library is libgcrypt:

  CCLD     glsl/tests/cache-test
glsl/.libs/libglsl.a(libmesautil_la-mesa-sha1.o): In function `call_once':
/mesa/src/util/../../include/c11/threads_posix.h:96: undefined reference to `pthread_once'

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-10-27 09:49:35 +11:00
Matt Turner
8e5aed5b56 genxml: Handle failure of Python codegen scripts. 2016-10-26 14:06:45 -07:00
Samuel Pitoiset
1ec7227d44 nvc0/ir: fix emission of SHLADD with NEG modifiers
This affects GF100:GK110 chipsets, but not GM107+ where the
logic is a bit different. The emitters tried to emit sub
instead of subr when src0 has a NEG modifier.

This fixes the following piglit tests glsl-fs-loop-nested
and glsl-vs-loop-nested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-10-26 22:18:04 +02:00
Erik Faye-Lund
aca491341b compiler: avoid warning about redefinition of PYTHON_GEN
PYTHON_GEN is defined to the exact same thing in both
Makefile.glsl.am and Makefile.nir.am. This makes automake complain,
so let's lift the definition up to Makefile.am, the same way as
MKDIR_GEN.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-26 14:54:26 +01:00
Eric Engestrom
4fa799ae04 egl/dri2: swap_buffers_with_damage falls back to swap_buffers
Since commit 0a606a400f ("egl: add eglSwapBuffersWithDamageKHR"),
Android has been broken because the function eglSwapBuffersWithDamageKHR
is provided regardless of the extension being present. Also, the Android
meta-EGL always advertises the extension regardless of the underlying
EGL implementation. As there doesn't seem to be a simple way
conditionally make the EGL function ptr NULL, just implement a brain
dead version of eglSwapBuffersWithDamage{KHR,EXT}.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
CC: Rob Clark <robdclark@gmail.com>
Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
[Emil Velikov: copy the original commit message from Rob's patch]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-26 12:04:21 +01:00
Emil Velikov
294b5f5f71 compiler: automake: add shader_info.h to the sources list
Otherwise it'll be missing from the tarball.

Fixes: 094fe3a959 ("nir: move nir_shader_info to a common compiler header")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-26 12:04:02 +01:00
Marek Olšák
b687f766fd st/mesa: allow multiple concurrent waiters in ClientWaitSync
so->fence can be unreferenced by one thread while another thread is
somewhere in ClientWaitSync and expecting so->fence to be non-NULL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98172

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
f240ad98bc st/mesa: unduplicate st_check_sync code
It's the same as st_client_wait_sync. Discovered by Michel.
This is needed to make the following fix simpler.

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
ad45dce4a2 radeonsi: remove si_resource_create_custom
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
29144d0f34 gallium/radeon: stop using PIPE_BIND_CUSTOM
it has no effect whatsoever

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
e3c3a7fada r600g: remove a redundant buffer_create helper
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
3dc78c33a9 gallium/radeon: remove unused r600_cmask_info members
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
d18bf0b944 gallium/radeon: don't force the same tiling parameters for FMASK
GCN can use a completely different tile mode for FMASK.

FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
ecf045b4f7 winsys/amdgpu: allocate FMASK properly
I expect no change in behavior, because r600_texture.c forces the same
tile mode as the base texture has.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
24faeb94be gallium/radeon: print tiling index when printing texture info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
37659071b8 gallium/radeon: don't do (fmask.size && cmask.size)
fmask implies that cmask is present too.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
2664351dfe gallium/radeon: re-order radeon_surf::dcc and htile members
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
2a2e537577 gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignment
these names were misleading.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
67a44c97af gallium/radeon: remove flags specific to libdrm_radeon from winsys interface
These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
7a706ad25c gallium/radeon: remove r600_htile_info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
7e73ff87c0 gallium/radeon: remove unnecessary fields from radeon_surf_level
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
d5c7ea3b83 gallium/radeon: decrease the size of radeon_surf
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
e9590d9092 gallium/radeon: pass pipe_resource and other params to surface_init directly
This removes input-only parameters from the radeon_surf structure.

Some of the translation logic from pipe_resource to radeon_surf is moved to
winsys/radeon.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
8b94976df9 radeon/vce: use nblk_y instead of npix_y
npix_y will be removed. level[0].npix_y will be removed too. nblk_y should
be the same as npix_y if the block height == 1. However, nblk_y is aligned
to the tile size, so it can be greater than npix_y.

If that's a problem, we'll have to save the input height of surface_init
and use that.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
ba174b8dff gallium/radeon: define RADEON_SURF_MODE_* as enums
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
b5118fe054 gallium/radeon: stop using some input fields from radeon_surface
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
28d237d63d gallium/radeon: fold r600_setup_surface into r600_init_surface
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
b0d8a717a7 winsys/amdgpu: remove unused definitions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00
Marek Olšák
81a95946da gallium/radeon: fold radeon_winsys::surface_best into radeon/winsys
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-26 13:02:58 +02:00