Commit graph

164384 commits

Author SHA1 Message Date
Rhys Perry
357d1fc75b radv/gfx11: enable VK_AMD_shader_explicit_vertex_parameter
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
2022-12-16 17:45:34 +00:00
Rhys Perry
201291d968 ac/llvm/gfx11: implement load_input_vertex
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
2022-12-16 17:45:34 +00:00
Rhys Perry
98e83f19f9 aco/gfx11: implement load_input_vertex
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
2022-12-16 17:45:34 +00:00
pal1000
f69b43ae3e OpenCL/draw module: Support linking with LLVM and clang 15 static libraries
Cc: mesa-stable

Closes: #7243

Closes: #7487

Reviewed-by: Karol Herbst <kherbst@redhat.com>

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19009>
2022-12-16 16:52:48 +00:00
Samuel Pitoiset
83617f4a57 radv: enable graphicsPipelineLibraryIndependentInterpolationDecoration
They don't need to match.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
2022-12-16 16:21:31 +00:00
Samuel Pitoiset
14e9fbb4d6 radv: enable graphicsPipelineLibraryFastLinking
I think fast-linking could be improved a lot but this allows to test
GPL with Zink (RADV_PERFTEST=gpl + ZINK_DEBUG=gpl).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
2022-12-16 16:21:31 +00:00
Samuel Pitoiset
24db7caebd radv: import compiled binaries from libraries only when fast-linking is enabled
When VK_PIPELINE_CREATE_LINK_TIME_OPTIMIZATION_BIT_EXT is used, the
pipeline includes a complete set of state specified entirely by
libraries. That means that we should skip using compiled binaries
(including PS epilogs) and we should create an optimized pipeline.

Found this with Zink because RADV was creating two pipelines with the
same PS epilog, while the optimized one shouldn't use any PS epilog.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
2022-12-16 16:21:31 +00:00
Rhys Perry
74ceff1816 radv/gfx11: disable mesh shaders
Even if the perftest is used, these should be disabled on GFX11. We
don't implement it yet

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: 22.3 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20358>
2022-12-16 15:58:49 +00:00
Rhys Perry
192486b7aa aco/gfx11: export mrtz in discard early exit for non-color shaders
If a shader doesn't export any color targets and instead only exports
mrtz, the discard early exit block should match.

Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).

https://reviews.llvm.org/D128185

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: bc8da20dda ("aco: export MRT0 instead of NULL on GFX11")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20345>
2022-12-16 15:35:28 +00:00
Erik Faye-Lund
c6cc1dc37c zink: fix line-smooth interpolation
Extending the lines by half a pixel in each direction without doing
anything about the varyings makes the varyings interpolate over a
distance than intended. While this can be negligeble for long lines,
it can lead to big error for short lines.

Let's instead add extra geometry for each of the line-caps, so we can
make sure the varyings stay constant for the whole cap, and interpolate
over the intended distance instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
2022-12-16 13:57:19 +00:00
Erik Faye-Lund
80285db9ef zink: lower smooth-lines if not supported
This implements line-smoothing the same way as the draw-module does,
except using a geometry shader instead of a CPU pass.

Ideally, this should be enabled either by checking for the various
smooth-line caps, or by a DRIconf setting.

Unfortunately, RADV doesn't support he smooth-lines features, and we
don't want to force it down a pessimistic shader-key code-path. So that
plan is out the window for now.

While DRIconf is also neat, it's a bit of work to wire up, and we don't
really know of any real-world applications who would need this yet. So,
for now, let's just unconditionally enable is on the IMG proprietary
driver, which is going to need this for sure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
2022-12-16 13:57:19 +00:00
Erik Faye-Lund
50d89663c5 zink: add line-smooth lowering passes
These passes implements basically the same logic as draw_pipe_aaline.c
does, but using geometry shaders instead of doing it CPU-side.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
2022-12-16 13:57:19 +00:00
Erik Faye-Lund
23f1294f42 zink: fix line-stipple varying allocation
This was really derpy. There's two things wrong; first of all, we should
pick at LEAST VARYING_SLOT_VAR0, second, util_last_bit64 returns one
more than the index of the bit already, so we don't want to add twice
here.

Fixes: 4b17c099ca ("zink: add line-stippling lowering passes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
2022-12-16 13:57:19 +00:00
Gert Wollny
f135309e73 r600/sfn: Check possibility of channel switching also for trans-slot
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7878

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20355>
2022-12-16 13:39:55 +00:00
Gert Wollny
4b89a8fd00 r600: don't try to serialized shaders translated from TGSI
TTN seems to have a problem encoding vec4[4] correctly, so that
serialization might fail.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7891

Fixes: 5b205ef (r600: Store nir shaders serialized to save memory)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20355>
2022-12-16 13:39:55 +00:00
David Heidelberg
a8b6b2367e ci: allow omitting of --rev for ci_run_n_monitor.py
When --rev is omitted, try to get revision automatically.

Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20271>
2022-12-16 14:00:37 +01:00
David Heidelberg
f745e86391 ci: ci_run_n_monitor fix Unicode log parsing
Fixes issues as  `...truncated \ xXX escape` while parsing the log.

Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20271>
2022-12-16 14:00:27 +01:00
Iago Toral Quiroga
df8611e816 v3dv: be more careful when restoring dirty state after meta operations
So far we have been only restoring dirty dynamic states used by meta
pipelines however, static state from meta pipelines will also clear
dirty flags, preventing follow-up draw calls in the command buffer
to honor these if they are flagged as dynamic states in their
pipelines. Fix this by always resetting all dirty state flags after
a meta operation so we re-emit all the state we need with the next draw
call.

Fixes:
dEQP-VK.dynamic_state.monolithic.image.clear

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20356>
2022-12-16 12:18:36 +00:00
Iago Toral Quiroga
3cc863649f v3dv: pipeline creation feedback may not request all stages
Nothing in the spec seems to require that the number of stages for
which creation feedback is requested must match the number of stages
available in the pipeline. In fact, the spec explicitly mentions
that this number could be 0:

   "If pipelineStageCreationFeedbackCount is not 0,
    pPipelineStageCreationFeedbacks must be a valid pointer to an
    array of pipelineStageCreationFeedbackCount
    VkPipelineCreationFeedback structures"

Fixes an assert crash in:
dEQP-VK.pipeline.monolithic.creation_feedback.graphics_tests.vertex_stage_fragment_stage_no_cache_zero_out_feedback_cout

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20352>
2022-12-16 11:14:40 +00:00
Michel Dänzer
bdcbdfdfcb egl/wayland: Prefer back buffer with minimum buffer age
This may allow applications making use of buffer age to save some effort
in some cases.

v2: (Simon Ser)
* Add space between struct member and "<" operator.
* Remove break statement which prevented the change from working as
  intended in swrast_update_buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
2022-12-16 10:30:47 +00:00
Michel Dänzer
ec90a6e132 loader/dri3: Simplify new buffer allocation in dri3_find_back
We can find the idle buffer with lowest buffer age or the first
unallocated slot in the same loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
2022-12-16 10:30:47 +00:00
Michel Dänzer
c82c71a650 loader/dri3: Find idle buffer with minimum buffer age in dri3_find_back
This may allow applications making use of buffer age to save some effort
in some cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
2022-12-16 10:30:47 +00:00
Michel Dänzer
d588145161 loader/dri3: Clean up dri3_find_back logic
No need to go through the loop again for allocating a new buffer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
2022-12-16 10:30:47 +00:00
Karol Herbst
a093a44d45 zink: lower mem_global to scalar
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
2022-12-16 08:02:32 +00:00
Karol Herbst
6d6c6caff1 nir_lower_io_to_scalar: handle load/store_global
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
2022-12-16 08:02:32 +00:00
Karol Herbst
3cd641bebd nir_lower_io_to_scalar: make use of nir_get_io_offset_src
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
2022-12-16 08:02:32 +00:00
Iago Toral Quiroga
ce94d3e48d v3dv: honor render area in subpass resolve fallback
When falling back to handling subpass resolves via separate
image resolves we were resolving the entire attachment instead
of limiting the resolve to the render area defined for the render
pass.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
2022-12-16 07:48:36 +00:00
Iago Toral Quiroga
9ac053e0a2 v3dv: handle depth/stencil resolves we can't implement via TLB
If we can't use the TLB to do a subpass resolve we have a fallaback
that emits separate image resolves, but this fallback was only
handling color resolves. This adds depth/stencil as well.

Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
2022-12-16 07:48:36 +00:00
Iago Toral Quiroga
284285376b v3dv: don't resolve by averaging samples on depth/stencil resolves
For these we always want to use sample_0, averaging is reserved for
color formats. We were already doing this correctly for depth/stencil
resolved in render passes, but not for those happening through
vkCmdResolveImage.

Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
2022-12-16 07:48:36 +00:00
Iago Toral Quiroga
6117f855ee v3dv: always store/restore attachment state during meta operations
attachment state is only relevant during render passes, however,
there is a corner case: if we can't resolve an attachment in a
subpass using the hardware, we emit a manual image resolve in the
driver which can trigger a meta operation via blit. In this case,
we pretend we are not in a render pass (since vulkan disallows
blits/resolves in a render pass) but we really want to keep the
attachment state after the meta operation.

Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
2022-12-16 07:48:36 +00:00
Chad Versace
a5f9e59ce3 anv: Use vma_heap for descriptor pool host allocation
Pre-patch, anv_descriptor_pool used a free list for host allocations
that never merged adjacent free blocks.  If the pool only allocated
fixed-sized blocks, then this would not be a problem. But the pool
allocations are variable-sized, and this caused over half of the pool's
memory to be consumed by unusable free blocks in some workloads, causing
unnecessary memory footprint.

Replacing the free list with util_vma_heap, which does merge adjacent
free blocks, fixes the memory explosion in the target workload.

Disdavantges of util_vma_heap compared to the free list:
  - The heap calls malloc() when a new hole is created.
  - The heap calls free() when a hole disappears or is merged with an
    adjacent hole.
  - The Vulkan spec expects descriptor set creation/destruction to be
    thread-local lockless in the common case. For workloads that
    create/destroy with high frequency, malloc/free may cause overhead.
    Profiling is needed.

Tested with a ChromeOS internal TensorFlow benchmark, provided by
package 'tensorflow', running with its OpenCL backend on clvk.

  cmdline: benchmark_model --graph=mn2.tflite --use_gpu=true --min_secs=60
  gpu: adl
  memory footprint from start of benchmark:
    before: init=132.691MB max=227.684MB
    after:  init=134.988MB max=134.988MB

Reported-by: Romaric Jodin <rjodin@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20289>
2022-12-16 07:18:38 +00:00
Chad Versace
94a6384f1b util/vma: Track size of free memory in heap
This allows users to detect fragmentation on allocation failure.
If heap allocation fails but the allocation size is not larger than the
total free size, then the allocation failed due to fragmentation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20289>
2022-12-16 07:18:38 +00:00
Iván Briano
766508f56a Revert "anv: Refactor anv_pipeline to use the anv_pipeline_type"
This reverts commit b1126abb38.

This breaks all hell at least on DG2, as there are several cases left
where current_pipeline gets checked against GPGPU to decide what to do,
and the value doesn't match that of ANV_HW_PIPELINE_STATE_COMPUTE.
On top of that, it also misses checking for
ANV_HW_PIPELINE_STATE_RAYTRACING.

Then there's the fact that in some cases, current_pipeline will be
UINT32_MAX, because it's the original undefined state and also used
after executing a secondary command buffer because we are not tracking
on which pipeline did the secondary left us.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7910
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20349>
2022-12-16 06:39:32 +00:00
Kenneth Graunke
94f2619b7d iris: Don't reject CPU access for non-invalidating buffer write maps
Buffer maps that don't invalidate their destination range work better
as direct CPU maps than staging blits.  The application may write only
part of the range, effectively combining the new data with existing
data.  So even if the map would stall, the staging blit path won't help
us, as we have to read the existing data to populate the staging buffer
before returning it.  This incurs a stall anyway - plus a read and copy.

In contrast, a direct map doesn't need to read any data - it can just
write the destination and the existing data will still be there.

Fixes excessive blits for stalling buffer writes that don't invalidate
the buffer since my recent map heuristic rework.

Fixes: bec68a85a2 ("iris: Improve direct CPU map heuristics")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7895
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20330>
2022-12-16 06:09:31 +00:00
Tapani Pälli
77244e30b6 anv: remove some gen8 specifics handled now in hasvk
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20342>
2022-12-16 07:25:30 +02:00
David Heidelberg
09d5c55836 ci: restore reliable Alpine 3.16
Alpine 3.17 suffered random freezes.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20294>
2022-12-16 00:26:27 +00:00
Nanley Chery
94b4a4b2a5 iris: Check for zero in clear color compatibility fn
Both formats may interpret the clear color as zero.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20320>
2022-12-15 21:20:37 +00:00
Sil Vilerino
002096fcc4 d3d12: Add ASSERTED to variables only used in debug builds to fix build MSVC with C4189 errors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20340>
2022-12-15 21:06:12 +00:00
Jordan Justen
5df50292d6 intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jianxun Zhang
6e33423a6f intel/dev: Enable AUX map on MTL
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jordan Justen
f81579628a intel/aux_map: Ignore format bits when using tile-4
Based on Jianxun's ("iris: don't get format bits in AUX tables").

With gfx12.5+, the compression format is once again coming from the
surface state programming. MTL once again uses an aux-map, but it
ignores the format bits within the the aux-map metadata.

Ref: Bspec 44930: "Compression format from AUX page walk is ignored.
Instead compression format from Surface State is used."

gfx12.5+ also uses tile-4 rather than y-tiling, so if we don't see
y-tiling, we can return 0 from intel_aux_map_format_bits() for the
ignored format bits.

Rework:
 * Just return 0 if not using y-tiling as suggested by Nanley.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jordan Justen
1bcce906e9 iris/resource: Check devinfo::has_local_mem before using BO_ALLOC_LMEM
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:42:59 -08:00
José Roberto de Souza
ac9af0dcee iris: Nuke dead IRIS_CONTEXT* macros
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
2dd1b12bc6 iris: Nuke flags from iris_bufmgr that can read from devinfo
Now that devinfo is stored in iris_bufmgr we can nuke this duplicated
flags.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
1e78dd9eda iris: Only fetch intel_device_info once per bufmgr
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
aff85114fd iris: Store intel_device_info in iris_bufmgr
We can have multiple pipe_screen but only one iris_bufmgr per device.
So better to store intel_device_info into the shared iris_bufmgr and
save some memory.
Also in future patches iris_bufmgr will make more use of
intel_device_info.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
Lionel Landwerlin
b21cd1ee1b anv: fixup another dirty issue with gpu_memcpy
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20335>
2022-12-15 17:30:55 +00:00
Patrick Lerda
87f0b7d0c1 panfrost: fix memory leak related to disk cache
Direct leak of 3912 byte(s) in 2 object(s) allocated from:
    #0 0x7fbd4641b0 in __interceptor_malloc (/usr/lib64/libasan.so.6+0xa41b0)
    #1 0x7f74413518 in parse_and_validate_cache_item ../src/util/disk_cache_os.c:549
    #2 0x7f74414b84 in disk_cache_load_item ../src/util/disk_cache_os.c:599
    #3 0x7f74410364 in disk_cache_get ../src/util/disk_cache.c:551
    #4 0x7f775695ac in panfrost_disk_cache_retrieve ../src/gallium/drivers/panfrost/pan_disk_cache.c:125

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20336>
2022-12-15 17:16:40 +00:00
Rohan Garg
b1126abb38 anv: Refactor anv_pipeline to use the anv_pipeline_type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20316>
2022-12-15 16:38:18 +00:00
Konstantin Seurer
ffc8d490b7 radv/rra: Fix leaf node id order
Leaf nodes aren't stored in build order so we have to account for that
when dumping leaf node ids.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
2022-12-15 16:00:17 +00:00