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intel/aux_map: Ignore format bits when using tile-4

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Based on Jianxun's ("iris: don't get format bits in AUX tables").

With gfx12.5+, the compression format is once again coming from the
surface state programming. MTL once again uses an aux-map, but it
ignores the format bits within the the aux-map metadata.

Ref: Bspec 44930: "Compression format from AUX page walk is ignored.
Instead compression format from Surface State is used."

gfx12.5+ also uses tile-4 rather than y-tiling, so if we don't see
y-tiling, we can return 0 from intel_aux_map_format_bits() for the
ignored format bits.

Rework:
 * Just return 0 if not using y-tiling as suggested by Nanley.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
This commit is contained in:
Jordan Justen 2022-12-13 17:07:02 -05:00
parent 1bcce906e9
commit f81579628a
1 changed files with 7 additions and 2 deletions
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9
src/intel/common/intel_aux_map.c
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@ -448,13 +448,18 @@ uint64_t
intel_aux_map_format_bits(enum isl_tiling tiling, enum isl_format format,
uint8_t plane)
{
/* gfx12.5+ uses tile-4 rather than y-tiling, and gfx12.5+ also uses
* compression info from the surface state and ignores the aux-map format
* bits metadata.
*/
if (!isl_tiling_is_any_y(tiling))
return 0;
if (aux_map_debug)
fprintf(stderr, "AUX-MAP entry %s, bpp_enc=%d\n",
isl_format_get_name(format),
isl_format_get_aux_map_encoding(format));
assert(isl_tiling_is_any_y(tiling));
uint64_t format_bits =
((uint64_t)isl_format_get_aux_map_encoding(format) << 58) |
((uint64_t)(plane > 0) << 57) |