Daniel Schürmann
f930ecdc55
amd: add newer small APUs to get_task_num_entries()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38999 >
2025-12-19 13:03:49 +00:00
Benjamin Cheng
fa8b0b6bbb
radv/video: Enable write combine for decode
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39025 >
2025-12-18 15:25:57 -05:00
Pierre-Eric Pelloux-Prayer
645fff5dae
ac/descriptors: account for num_storage_samples for gfx10
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This fixes a page fault when nr_samples=4 but nr_storage_samples=2.
Based on si_is_format_supported this is only supported for color
formats and when has_eqaa_surface_allocator is true (< GFX11).
The referenced commit below didn't introduce the issue but it
exposed it by forcing the gfx blit path to be used.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13255
Fixes: 3424e16ecehttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38925 >
2025-12-18 10:45:49 +00:00
Marek Olšák
3c5c96fedb
radv: double pixel throughput in certain cases of PS without interpolated inputs
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This reduces the number of initialized VGPRs by 1 when no barycentric
coordinates are used.
I have verified with zink that this indeed increases performance for
cases where sysvals like frag_coord and front_face are used without
interpolated PS inputs.
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38936 >
2025-12-18 03:37:58 +00:00
Emma Anholt
059d301c79
nir: Drop the mode argument of nir_lower_vars_to_scratch().
...
It only makes sense for function temps, and that's the only way it's been
used.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37245 >
2025-12-17 19:50:28 +00:00
Samuel Pitoiset
f8feed17e1
ac,radv,radeonsi: add tracked register macros to common code
...
Because the tracked registers are really driver dependant, the driver
is expected to handle the tracked_registers struct itself.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:26 +00:00
Samuel Pitoiset
c580fc667f
ac,radv: add ac_cmdbuf::context_roll and use it
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:26 +00:00
Samuel Pitoiset
f3b385859a
ac,radv: add more cmdbuf emit helpers
...
Some can't be shared with RadeonSI because it uses templates in some
places.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:25 +00:00
Samuel Pitoiset
b444dc145a
radv: remove redundant assertions in radeon_emit_{array}()
...
The common helpers already have assertions.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:25 +00:00
Samuel Pitoiset
262fc80e45
ac,radv,radeonsi: add functions to initialize tracked regs
...
Also initialize the new slots for RADV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:25 +00:00
Samuel Pitoiset
44314e1ea6
ac,radv,radeonsi: add ac_tracked_regs
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:24 +00:00
Samuel Pitoiset
c97bd17d4d
radv: switch to AC_TRACKED_xxx
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:23 +00:00
Samuel Pitoiset
fad24d6fcc
ac/cmdbuf: add new slots to ac_tracked_reg
...
For RADV registers that aren't tracked in RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:23 +00:00
Samuel Pitoiset
18bdb76408
ac,radeonsi: move si_tracked_reg to common code
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740 >
2025-12-17 15:09:22 +00:00
Samuel Pitoiset
5d76202b6d
radv: create descriptors for color/depth-stencil surfaces earlier
...
For less CPU overhead when rendering begins and also because it's
easy to pre-compute those descriptors.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714 >
2025-12-17 11:11:18 +00:00
Samuel Pitoiset
c8729cdd3c
radv/meta: stop passing a stencil attachment for depth decompress
...
It should only be the depth aspect.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714 >
2025-12-17 11:11:18 +00:00
Samuel Pitoiset
43d7d97b13
radv/meta: inject image view usage info
...
This will be used to initialize color/depth-stencil descriptors earlier
when the image view is created.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714 >
2025-12-17 11:11:18 +00:00
Samuel Pitoiset
ce69cabb60
radv: constify radv_{cb,ds}_buffer_info parameters
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714 >
2025-12-17 11:11:18 +00:00
Georg Lehmann
0478021fdc
aco/optimizer: reassociate rcp(mul(a, const)) into rcp_omod(a)
...
Foz-DB Navi48:
Totals from 2484 (2.54% of 97637) affected shaders:
Instrs: 10368279 -> 10361892 (-0.06%); split: -0.06%, +0.00%
CodeSize: 55161104 -> 55150752 (-0.02%); split: -0.02%, +0.00%
SpillSGPRs: 14665 -> 14666 (+0.01%)
Latency: 87694014 -> 87689324 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 16595764 -> 16594448 (-0.01%); split: -0.01%, +0.00%
VClause: 209922 -> 209918 (-0.00%); split: -0.01%, +0.00%
SClause: 205195 -> 205251 (+0.03%); split: -0.01%, +0.04%
Copies: 843771 -> 843765 (-0.00%); split: -0.01%, +0.01%
Branches: 275985 -> 275962 (-0.01%); split: -0.01%, +0.00%
PreVGPRs: 170608 -> 170494 (-0.07%)
VALU: 5840893 -> 5838038 (-0.05%); split: -0.05%, +0.00%
SALU: 1481388 -> 1479037 (-0.16%); split: -0.16%, +0.00%
VOPD: 7496 -> 7485 (-0.15%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38730 >
2025-12-17 08:41:32 +00:00
Georg Lehmann
a8f5ced670
aco/optimizer: reassociate mul(mul(a, const), b) into mul_omod(a, b)
...
Foz-DB Navi48:
Totals from 14608 (14.96% of 97637) affected shaders:
MaxWaves: 364201 -> 364421 (+0.06%)
Instrs: 28051720 -> 28022503 (-0.10%); split: -0.13%, +0.03%
CodeSize: 148938740 -> 148943480 (+0.00%); split: -0.04%, +0.04%
VGPRs: 994520 -> 994004 (-0.05%); split: -0.05%, +0.00%
SpillSGPRs: 45182 -> 45179 (-0.01%)
Latency: 187734461 -> 187725301 (-0.00%); split: -0.07%, +0.06%
InvThroughput: 33967002 -> 33949881 (-0.05%); split: -0.11%, +0.06%
VClause: 495237 -> 495207 (-0.01%); split: -0.03%, +0.02%
Copies: 2048324 -> 2047937 (-0.02%); split: -0.12%, +0.10%
Branches: 598445 -> 598431 (-0.00%); split: -0.01%, +0.01%
PreSGPRs: 877715 -> 877684 (-0.00%)
PreVGPRs: 778146 -> 776383 (-0.23%); split: -0.23%, +0.00%
VALU: 16413380 -> 16391508 (-0.13%); split: -0.15%, +0.01%
SALU: 3685279 -> 3677655 (-0.21%); split: -0.23%, +0.02%
VOPD: 26219 -> 25926 (-1.12%); split: +0.43%, -1.55%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38730 >
2025-12-17 08:41:31 +00:00
Daniel Schürmann
125ac1626d
radv: remove precomputed registers from radv_shader_binary
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
It is enough to compute them after upload.
This saves some disk space and eliminates an unlikely
bug where the shader cache is shared between two GPUs
with the same chip but a different number of enabled CUs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38970 >
2025-12-17 08:16:06 +00:00
Alyssa Rosenzweig
079e9ae606
treewide: use BITSET_*_COUNT
...
Mix of Coccinelle patch, manual fix ups, sed, etc. Probably best to review the diff
as-if hand written:
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38955 >
2025-12-16 17:42:10 +00:00
Samuel Pitoiset
6193483c4f
radv: rename RADEON_FLAG_VA_UNCACHED to RADEON_FLAG_GL2_BYPASS
...
Easier to understand.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38907 >
2025-12-16 07:17:08 +00:00
Samuel Pitoiset
0beb83b0eb
radv: add RADV_DEBUG=vm option
...
Useful for debugging page faults because this adds a gap between every
VA allocation.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38907 >
2025-12-16 07:17:08 +00:00
Mauro Rossi
e8134e6eaf
radv/rt: Fix gnu-empty-initializer error
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes the following building error happening with clang:
FAILED: src/amd/vulkan/libvulkan_radeon.so.p/nir_radv_nir_rt_traversal_shader.c.o
...
../src/amd/vulkan/nir/radv_nir_rt_traversal_shader.c:1159:49: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
struct radv_nir_rt_traversal_params params = {};
^
1 error generated.
Fixes: f692ac76https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38954 >
2025-12-15 22:27:29 +01:00
Timur Kristóf
0324700c03
radv: Use zero-filled BO for GFX6 and GFX10 null index buffer bug
...
GFX10 hangs when drawing from a 0-sized index buffer.
GFX6 has a HW bug when the index buffer address is 0.
Looking at VK CTS runs, GFX6 still triggers VM faults despite the
current mitigation, and it also tries to access memory when the
index buffer is zero sized. So it looks like GFX6 and GFX10
really have the same bug.
Let's share the mitigation between the two.
Use a zero-filled BO instead of the upload buffer.
This fixes VM faults on GFX6, and should speed up GFX10 a bit.
Note that the zero-filled BO is also going to be used for
other bug mitigations on GFX6-7.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38958 >
2025-12-15 21:03:19 +00:00
Timur Kristóf
f001515c87
aco: Use only VGPR offset on buffer atomics on GFX6-7
...
SGPR offset is not included in the bounds check
according to the ISA documentation of GFX6-7 and
indeed it can trigger VM faults on OOB access.
Note that ACO already doesn't use the SGPR offset
on GFX6-7 for buffer loads and stores. This commit
just does the same for buffer atomics.
This commit mitigates a ton of VM faults that are exposed by:
24e75fea4bhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38958 >
2025-12-15 21:03:19 +00:00
Benjamin Cheng
59f821218c
radv/video: Move probability table filling to bind
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
We should not manipulate the session buffers at command recording time.
It shouldn't cause any problems as these initialized probability tables
are not modified by firmware, but moving these to bind time should be
safer and also faster if an application frequently RESETs.
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38926 >
2025-12-15 18:49:28 +00:00
Georg Lehmann
a2b70ce4ec
aco/isel: remove uniform reduce/scan optimization
...
This is now done in NIR, with the exception of exclusive min/max/and/or scans.
But those are not really useful, and if we ever come across them we can
optimize them in NIR using write_invocation_amd.
No Foz-DB changes on Navi21.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38902 >
2025-12-15 12:22:32 +00:00
Georg Lehmann
ec81337d8d
radv: use nir_opt_uniform_subgroup
...
Foz-DB Navi21:
Totals from 665 (0.68% of 97581) affected shaders:
MaxWaves: 12856 -> 12822 (-0.26%)
Instrs: 2073376 -> 2068645 (-0.23%); split: -0.23%, +0.00%
CodeSize: 11116904 -> 11098376 (-0.17%); split: -0.18%, +0.01%
VGPRs: 39584 -> 39568 (-0.04%); split: -0.20%, +0.16%
SpillSGPRs: 160 -> 155 (-3.12%)
SpillVGPRs: 2995 -> 2968 (-0.90%)
Latency: 15432093 -> 15503462 (+0.46%); split: -0.13%, +0.59%
InvThroughput: 3344411 -> 3351185 (+0.20%); split: -0.08%, +0.28%
VClause: 50278 -> 50225 (-0.11%); split: -0.15%, +0.04%
SClause: 57537 -> 57505 (-0.06%); split: -0.18%, +0.13%
Copies: 189642 -> 188175 (-0.77%); split: -0.86%, +0.08%
Branches: 68800 -> 68502 (-0.43%); split: -0.45%, +0.02%
PreSGPRs: 37646 -> 37068 (-1.54%)
PreVGPRs: 35891 -> 35943 (+0.14%)
VALU: 1386943 -> 1385881 (-0.08%); split: -0.09%, +0.01%
SALU: 287322 -> 284165 (-1.10%); split: -1.11%, +0.01%
VMEM: 90874 -> 90820 (-0.06%)
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38902 >
2025-12-15 12:22:32 +00:00
Georg Lehmann
fee87679bf
radv/nir: fix front_face_fsign opt
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
If front facing primitives are culled, there are only back facing fragments left.
Fixes: 0fe8250bf4https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38937 >
2025-12-13 10:22:21 +01:00
Georg Lehmann
17e597093d
radv: eliminate unused FS output channels
...
For formats that don't have all color channels, there is no reason to
output all of them.
Games often write to R only or RGB formats with non trivial remaining channels.
Foz-DB Navi21:
Totals from 10270 (10.55% of 97347) affected shaders:
MaxWaves: 249166 -> 250950 (+0.72%); split: +0.73%, -0.01%
Instrs: 8442016 -> 8354715 (-1.03%); split: -1.05%, +0.01%
CodeSize: 45939644 -> 45487156 (-0.98%); split: -1.01%, +0.02%
VGPRs: 472584 -> 463784 (-1.86%); split: -1.98%, +0.12%
SpillSGPRs: 1502 -> 1448 (-3.60%)
LDS: 6024192 -> 6011904 (-0.20%)
Inputs: 42463 -> 41773 (-1.62%)
Outputs: 24601 -> 23955 (-2.63%)
Latency: 78011745 -> 77653907 (-0.46%); split: -0.56%, +0.10%
InvThroughput: 19767826 -> 19274046 (-2.50%); split: -2.53%, +0.03%
VClause: 177891 -> 176681 (-0.68%); split: -0.80%, +0.12%
SClause: 236784 -> 235324 (-0.62%); split: -0.72%, +0.10%
Copies: 621048 -> 616096 (-0.80%); split: -1.03%, +0.23%
Branches: 202608 -> 201811 (-0.39%); split: -0.44%, +0.05%
PreSGPRs: 441032 -> 437698 (-0.76%); split: -0.77%, +0.01%
PreVGPRs: 378067 -> 369564 (-2.25%); split: -2.26%, +0.01%
VALU: 5906415 -> 5833179 (-1.24%); split: -1.25%, +0.01%
SALU: 973428 -> 968088 (-0.55%); split: -0.61%, +0.06%
VMEM: 298277 -> 296504 (-0.59%); split: -0.61%, +0.01%
SMEM: 402244 -> 399612 (-0.65%); split: -0.71%, +0.06%
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
5d2f3065fd
radv: gather color0_written with scalar io correctly
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
18013e3281
radv: consider dual src blend for when epilog needs alpha
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
a1fbf91ff2
radv/nir: fix radv_nir_remap_color_attachment progress
...
And switch to SPDX header.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
da197c3d55
ac/nir/lower_ps_late: remove gfx6 mrtz writemask workaround
...
This is now done in the backends.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
6a7ff2204b
ac/llvm/gfx6: move mrtz writemask workaround to ac_build_export
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Georg Lehmann
072815e5cb
aco/gfx6: move mrtz writemask workaround to assembler and handle all mrt
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853 >
2025-12-12 17:00:51 +00:00
Rhys Perry
b5cf3b1628
ac/nir: fix check for increasing size of non-descriptor loads
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
In the previous version, "end" could have been zero, which would have
allowed an increase of "mul" bytes, when it should not not be increased at all.
For example:
- align_offset=4
- mul=4
- unaligned_new_size=96
- aligned_new_size=128
This would have loaded a dword which was not loaded previously.
fossil-db (gfx1201):
Totals from 115 (0.14% of 79839) affected shaders:
Instrs: 286697 -> 287097 (+0.14%); split: -0.16%, +0.30%
CodeSize: 1477728 -> 1481256 (+0.24%); split: -0.13%, +0.37%
SpillSGPRs: 1662 -> 1658 (-0.24%); split: -0.42%, +0.18%
Latency: 2288612 -> 2290248 (+0.07%); split: -0.04%, +0.11%
InvThroughput: 467307 -> 467602 (+0.06%); split: -0.03%, +0.10%
VClause: 3689 -> 3691 (+0.05%)
SClause: 5052 -> 5064 (+0.24%); split: -0.20%, +0.44%
Copies: 34837 -> 35103 (+0.76%); split: -0.80%, +1.56%
Branches: 7402 -> 7401 (-0.01%)
PreSGPRs: 9147 -> 9143 (-0.04%); split: -0.44%, +0.39%
VALU: 159333 -> 159372 (+0.02%); split: -0.01%, +0.04%
SALU: 52047 -> 52276 (+0.44%); split: -0.55%, +0.99%
SMEM: 9556 -> 9697 (+1.48%)
fossil-db (navi31):
Totals from 238 (0.30% of 79825) affected shaders:
Instrs: 484480 -> 485105 (+0.13%); split: -0.05%, +0.17%
CodeSize: 2514012 -> 2517928 (+0.16%); split: -0.06%, +0.22%
SpillSGPRs: 1064 -> 1059 (-0.47%)
Latency: 3941121 -> 3944670 (+0.09%); split: -0.04%, +0.13%
InvThroughput: 897483 -> 898090 (+0.07%); split: -0.04%, +0.11%
VClause: 7101 -> 7098 (-0.04%)
SClause: 9036 -> 9052 (+0.18%); split: -0.44%, +0.62%
Copies: 42790 -> 43096 (+0.72%); split: -0.30%, +1.01%
PreSGPRs: 14357 -> 14342 (-0.10%); split: -0.37%, +0.26%
VALU: 298325 -> 298347 (+0.01%); split: -0.01%, +0.02%
SALU: 57288 -> 57577 (+0.50%); split: -0.20%, +0.70%
SMEM: 18768 -> 18967 (+1.06%); split: -0.01%, +1.07%
fossil-db (navi21):
Totals from 239 (0.30% of 79825) affected shaders:
Instrs: 444783 -> 445177 (+0.09%); split: -0.07%, +0.15%
CodeSize: 2371776 -> 2373136 (+0.06%); split: -0.13%, +0.19%
Latency: 4226478 -> 4219221 (-0.17%); split: -0.24%, +0.07%
InvThroughput: 1430962 -> 1428445 (-0.18%); split: -0.23%, +0.06%
SClause: 9357 -> 9398 (+0.44%); split: -0.20%, +0.64%
Copies: 42742 -> 42927 (+0.43%); split: -0.53%, +0.96%
Branches: 12975 -> 12970 (-0.04%); split: -0.05%, +0.02%
PreSGPRs: 14368 -> 14312 (-0.39%); split: -0.47%, +0.08%
VALU: 306642 -> 306720 (+0.03%); split: -0.02%, +0.05%
SALU: 63702 -> 63790 (+0.14%); split: -0.31%, +0.45%
SMEM: 20030 -> 20231 (+1.00%); split: -0.00%, +1.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14458
Backport-to: 25.3
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38903 >
2025-12-12 13:58:42 +00:00
Rhys Perry
49d923078f
ac/nir: fix calculation of aligned_new_size
...
This should consider nir_round_up_components().
fossil-db (gfx1201):
Totals from 90 (0.11% of 79839) affected shaders:
MaxWaves: 1829 -> 1901 (+3.94%)
Instrs: 410780 -> 411825 (+0.25%); split: -0.02%, +0.27%
CodeSize: 2227956 -> 2234464 (+0.29%); split: -0.02%, +0.31%
VGPRs: 6952 -> 6760 (-2.76%); split: -3.11%, +0.35%
Latency: 3071765 -> 3073960 (+0.07%); split: -0.00%, +0.07%
InvThroughput: 766201 -> 767322 (+0.15%); split: -0.00%, +0.15%
VClause: 7887 -> 7898 (+0.14%); split: -0.08%, +0.22%
Copies: 48189 -> 48324 (+0.28%); split: -0.05%, +0.33%
PreVGPRs: 6605 -> 6595 (-0.15%); split: -0.18%, +0.03%
VALU: 237272 -> 238147 (+0.37%); split: -0.01%, +0.37%
SALU: 48987 -> 49003 (+0.03%)
VMEM: 15542 -> 15560 (+0.12%)
VOPD: 188 -> 200 (+6.38%)
fossil-db (navi31):
Totals from 89 (0.11% of 79825) affected shaders:
MaxWaves: 1811 -> 1883 (+3.98%)
Instrs: 403695 -> 404691 (+0.25%); split: -0.01%, +0.26%
CodeSize: 2150612 -> 2154860 (+0.20%); split: -0.03%, +0.23%
VGPRs: 6892 -> 6676 (-3.13%)
Latency: 3306107 -> 3310010 (+0.12%); split: -0.01%, +0.13%
InvThroughput: 813092 -> 814382 (+0.16%); split: -0.00%, +0.16%
VClause: 7999 -> 8010 (+0.14%); split: -0.06%, +0.20%
Copies: 50089 -> 50210 (+0.24%); split: -0.05%, +0.29%
PreVGPRs: 6596 -> 6586 (-0.15%); split: -0.18%, +0.03%
VALU: 239617 -> 240392 (+0.32%); split: -0.01%, +0.33%
SALU: 45349 -> 45363 (+0.03%)
VMEM: 15762 -> 15780 (+0.11%)
VOPD: 258 -> 262 (+1.55%)
fossil-db (navi21):
Totals from 89 (0.11% of 79825) affected shaders:
Instrs: 345634 -> 346426 (+0.23%); split: -0.00%, +0.23%
CodeSize: 1895616 -> 1900156 (+0.24%); split: -0.00%, +0.24%
Latency: 3043334 -> 3046859 (+0.12%); split: -0.01%, +0.13%
InvThroughput: 928236 -> 929626 (+0.15%); split: -0.01%, +0.16%
VClause: 7894 -> 7905 (+0.14%); split: -0.06%, +0.20%
Copies: 48694 -> 48785 (+0.19%); split: -0.03%, +0.22%
PreVGPRs: 6580 -> 6570 (-0.15%); split: -0.18%, +0.03%
VALU: 228323 -> 229072 (+0.33%); split: -0.01%, +0.33%
SALU: 47202 -> 47216 (+0.03%)
VMEM: 16546 -> 16564 (+0.11%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14458
Backport-to: 25.3
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38903 >
2025-12-12 13:58:42 +00:00
Georg Lehmann
0fe8250bf4
radv: optimize known front_face_fsign too
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Foz-DB Navi21:
Totals from 1941 (1.99% of 97581) affected shaders:
MaxWaves: 44196 -> 44612 (+0.94%); split: +0.97%, -0.03%
Instrs: 1553182 -> 1548823 (-0.28%); split: -0.36%, +0.08%
CodeSize: 8261308 -> 8261496 (+0.00%); split: -0.17%, +0.18%
VGPRs: 98488 -> 97968 (-0.53%); split: -0.56%, +0.03%
SpillSGPRs: 1288 -> 1347 (+4.58%)
Latency: 19136399 -> 19094748 (-0.22%); split: -0.38%, +0.16%
InvThroughput: 5424693 -> 5409469 (-0.28%); split: -0.32%, +0.04%
VClause: 29941 -> 29943 (+0.01%); split: -0.26%, +0.27%
SClause: 39922 -> 39972 (+0.13%); split: -1.02%, +1.14%
Copies: 109736 -> 109684 (-0.05%); split: -1.45%, +1.40%
Branches: 24523 -> 24499 (-0.10%); split: -0.12%, +0.02%
PreSGPRs: 99206 -> 99191 (-0.02%); split: -0.02%, +0.00%
PreVGPRs: 79019 -> 78240 (-0.99%); split: -1.00%, +0.02%
VALU: 1145088 -> 1140731 (-0.38%); split: -0.44%, +0.06%
SALU: 164035 -> 164077 (+0.03%); split: -0.48%, +0.51%
SMEM: 80668 -> 80658 (-0.01%)
We used to call this pass before front_face_fsign is created
but that has changed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38906 >
2025-12-12 08:24:38 +00:00
Marek Olšák
9bd2c6dcb2
ac/nir: allow smaller workgroups for GS
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
It's not good for performance, but it's possible to use for debugging.
Running single-wave GS workgroups could work around any LDS race conditions.
Setting the workgroup size to 64 reliably works around
GLCTS *primitive_counter*line failures, indicating streamout data
corruption with multi-wave GS workgroups.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38328 >
2025-12-12 04:27:32 +00:00
Qiang Yu
3f37740762
ac/llvm: workaround legacy fma intrinsic crash on gfx12
...
This is a llvm bug:
https://github.com/llvm/llvm-project/issues/170437
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14359
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38884 >
2025-12-12 02:08:41 +00:00
Christian Gmeiner
b393518bdf
treewide: Use wsi_common_is_swapchain_image() helper
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Replace the duplicated swapchain image detection pattern across all
Vulkan drivers with the new wsi_common_is_swapchain_image() helper.
Since the swapchain handle can be extracted from VkImageCreateInfo's
pNext chain inside wsi_common_create_swapchain_image(), remove the
now-redundant VkSwapchainKHR parameter from that function.
This removes the #ifdef guards for Android/WSI platforms from each
driver, as the helper now handles this uniformly.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38541 >
2025-12-11 20:20:39 +00:00
Rhys Perry
156ae6195e
aco: print large p_parallelcopy using several lines
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Emre Cecanpunar <emreleno@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38695 >
2025-12-11 16:51:21 +00:00
Rhys Perry
21414e0898
aco/ra: add first loop header phi operand to temp_to_phi_resources
...
If the first operand is a CSSA copy, we might want to add this to
temp_to_phi_resources, so that we later mark it as the last-seen phi
operand.
fossil-db (navi31):
Totals from 284 (0.36% of 79825) affected shaders:
Instrs: 4160233 -> 4157517 (-0.07%); split: -0.09%, +0.03%
CodeSize: 21546420 -> 21532884 (-0.06%); split: -0.09%, +0.02%
VGPRs: 31404 -> 31416 (+0.04%)
Latency: 40266308 -> 40253731 (-0.03%); split: -0.06%, +0.02%
InvThroughput: 8140751 -> 8139724 (-0.01%); split: -0.05%, +0.04%
VClause: 99849 -> 99835 (-0.01%); split: -0.02%, +0.01%
Copies: 344512 -> 341732 (-0.81%); split: -1.08%, +0.28%
Branches: 113620 -> 113629 (+0.01%); split: -0.02%, +0.03%
VALU: 2502619 -> 2499836 (-0.11%); split: -0.15%, +0.04%
SALU: 499245 -> 499341 (+0.02%); split: -0.02%, +0.04%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Emre Cecanpunar <emreleno@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38695 >
2025-12-11 16:51:21 +00:00
Rhys Perry
43b3901362
aco/ra: copy vector_info to affinities
...
This eliminates some copies in BVH traversal loops.
fossil-db (navi31):
Totals from 200 (0.25% of 79825) affected shaders:
Instrs: 734931 -> 732521 (-0.33%); split: -0.34%, +0.01%
CodeSize: 3801080 -> 3791692 (-0.25%); split: -0.26%, +0.01%
VGPRs: 13704 -> 13728 (+0.18%); split: -0.44%, +0.61%
Latency: 6094605 -> 6082060 (-0.21%); split: -0.24%, +0.03%
InvThroughput: 1081982 -> 1080121 (-0.17%); split: -0.19%, +0.02%
VClause: 18835 -> 18837 (+0.01%); split: -0.01%, +0.02%
Copies: 64602 -> 62239 (-3.66%); split: -3.75%, +0.09%
Branches: 20111 -> 20112 (+0.00%); split: -0.01%, +0.02%
VALU: 438618 -> 436257 (-0.54%); split: -0.55%, +0.01%
SALU: 85092 -> 85085 (-0.01%); split: -0.01%, +0.00%
VOPD: 76 -> 74 (-2.63%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Emre Cecanpunar <emreleno@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38695 >
2025-12-11 16:51:21 +00:00
Konstantin Seurer
85e8f815e0
radv/nir: Use fmt_idx correctly
...
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38462 >
2025-12-11 16:26:01 +00:00
Konstantin Seurer
c14eb415a2
radv/bvh: Avoid a slow case when compressing triangles
...
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38462 >
2025-12-11 16:26:01 +00:00
Konstantin Seurer
2749b5b713
radv/bvh: Fix calculating the vertex payload/prefix sizes
...
This calculation needs to happen in the same loop as the
geometry/triangle id calculations in case the selected invocation is
before all invocations that were already selected.
Totals from 1269 (15.10% of 8406) affected BVHs:
compacted_size: 137581888 -> 137606464 (+0.02%); split: -0.08%, +0.10%
sah: 6496048424 -> 6496048450 (+0.00%); split: -0.00%, +0.00%
primitive_node_count: 604384 -> 604656 (+0.05%); split: -0.14%, +0.19%
Fixes: c18a7d0https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38462 >
2025-12-11 16:26:00 +00:00
