Georg Lehmann da197c3d55 ac/nir/lower_ps_late: remove gfx6 mrtz writemask workaround ... This is now done in the backends. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>		2025-12-12 17:00:51 +00:00
..
addrlib	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
ci	ci: Uprev GL & GLES CTS	2025-12-10 11:31:33 +00:00
common	ac/nir/lower_ps_late: remove gfx6 mrtz writemask workaround	2025-12-12 17:00:51 +00:00
compiler	aco/gfx6: move mrtz writemask workaround to assembler and handle all mrt	2025-12-12 17:00:51 +00:00
drm-shim	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	ac/llvm/gfx6: move mrtz writemask workaround to ac_build_export	2025-12-12 17:00:51 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: add FL capabilitie and lut container size	2025-09-22 10:37:22 +00:00
vulkan	radv: optimize known front_face_fsign too	2025-12-12 08:24:38 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00