Commit graph

132633 commits

Author SHA1 Message Date
Mike Blumenkrantz
5b2c397c54 zink: add handling for tcs and tes shader states
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
536520d056 zink: support PIPE_PRIM_PATCHES
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
291bbac12c zink: set tess info in pipeline creation
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
2891e0b74e zink: pull xfb info from tess shader when applicable
if it's the last vertex stage then it does the xfb

Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
612d8f81c3 zink: set scoped barrier flag in nir options
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
6ca3866056 zink: set up ntv init for tess shaders
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
c744f079fe zink: add handling for tess shader intrinsics
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
d09f9da4c4 zink: add ntv handling for tess shader i/o variables
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Mike Blumenkrantz
244310eddc zink: don't always run nir_lower_io_arrays_to_elements_no_indirects
this is automatically run for fs and vs, which is the only place we really
want it

Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
2020-12-22 13:46:38 +00:00
Samuel Pitoiset
4a4ea89a99 radv: add code that checks if the extension table is sorted correctly
Ported from ANV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8190>
2020-12-22 14:09:54 +01:00
Samuel Pitoiset
e1d1e5b7bd radv: sort the extension table like Khronos
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8190>
2020-12-22 14:09:52 +01:00
Marek Olšák
47199ee0cc cso: inline cso_construct_key
The x86 asm is a lot shorter and the loop is unrolled.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
0d7aae7d9c cso: remove context and delete_state pointers from all CSOs
We just need them per context, not per CSO. The new delete callback
replaces the per-CSO callbacks.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
e91c6ca5b2 st/mesa: don't make a local copy of blend color
This is perfectly safe and nothing bad can happen... and we have also CI.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
a35014954b cso: don't pass blend_color through cso_context
It's never saved or restored. Redundant state changes are already
filtered out by mesa/main.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
912ba743b5 gallium: inline pipe_depth_state to decrease DSA state size by 4 bytes
Depth and alpha states are now packed together, interleaved somewhat.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
d0534cea7f gallium: inline pipe_alpha_state to enable better DSA bitfield packing
pipe_alpha_state and pipe_depth_state will be packed together
because they have only a few bitfields each. This will eventually
remove 4 bytes of padding in pipe_depth_stencil_alpha_state.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Marek Olšák
b7f12a0452 gallium: pass pipe_stencil_ref by value (it has only 2 bytes)
This changes pipe_context::set_stencil_ref to pass the parameter by value.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
2020-12-22 12:01:38 +00:00
Samuel Pitoiset
2d87e52b37 radv: enable VK_EXT_line_rasterization on GFX9
It was disabled because some CTS failed but they pass now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8189>
2020-12-22 09:25:48 +01:00
Hyunjun Ko
ec1464077b turnip: use ir3_compiler_destroy instead of ralloc_free
Fixes: c0f22c3d94 "freedreno/ir3: add ir3_compiler_destroy()"

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6808>
2020-12-22 04:57:22 +00:00
Hyunjun Ko
19a7a915ca turnip/kgsl: support VK_KHR_performance_query
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6808>
2020-12-22 04:57:22 +00:00
Hyunjun Ko
3d90909837 turnip: enable VK_KHR_performance_query with new debug flag
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6808>
2020-12-22 04:57:22 +00:00
Hyunjun Ko
c921a6e98d turnip: support multipass for performance query.
To support multipass, querying perf counters happens in several steps
below.

0) There's a scratch reg to set pass indices for perf counters query.
   Prepare cmd streams to set each pass index to the reg at device
   creation time. See tu_CreateDevice in tu_device.c
1) Emit command streams to read all requested perf counters at all
   passes in begin/end query with CP_REG_TEST/CP_COND_REG_EXEC, which
   reads the scratch reg where pass index is set.
2) Pick the right cs setting proper pass index to the reg and prepend it
   to the command buffer at each submit time.
3) If the pass index in the reg is true, then executes the command
   stream below CP_COND_REG_EXEC.

Would need to implement for kgsl in the future.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6808>
2020-12-22 04:57:22 +00:00
Hyunjun Ko
937dd76426 turnip: Implement VK_KHR_performance_query
There are still some commands unimplemented yet.

- vkGetPhysicalDeviceQueueFamilyPerformanceQueryPassesKHR:
  The following patch supports this.

- vkAcquireProfilingLockKHR / vkReleaseProfilingLock
  This patch supports only monitoring perf counters for each submit.
  To reserve/configure counters across submits we would need a kernel
  interface to be able to do that.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6808>
2020-12-22 04:57:22 +00:00
Icecream95
a250f3620c panfrost: Fix panfrost_small_padded_vertex_count for 17 vertices
All odd numbers above 10 need to be rounded up to an even number, so
add one and mask off the least significant bit instead of maintaining
a list of special cases.

Fixes crashes in SuperTuxKart.

Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8191>
2020-12-22 01:54:24 +00:00
Icecream95
fdcb03c2d7 panfrost: Expose ARB_texture_filter_anisotropic on supported GPUs
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8149>
2020-12-21 22:49:28 +00:00
Icecream95
48c676c501 panfrost: Add a gpu_revision argument to panfrost_get_quirks
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8149>
2020-12-21 22:49:28 +00:00
Icecream95
0322653b71 panfrost: Set the anisotropy level when cso->max_anisotropy is set
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8149>
2020-12-21 22:49:28 +00:00
Icecream95
601dfd0093 panfrost: Fix the Maximum anisotropy field in the XML
It needs a a minus(1) modifier.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8149>
2020-12-21 22:49:28 +00:00
Alyssa Rosenzweig
9c042b6976 panfrost: Fix LOD mode field on Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8149>
2020-12-21 22:49:28 +00:00
Alyssa Rosenzweig
8db0775f45 pan/bi: Minor styling cleanup in disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8139>
2020-12-21 21:54:50 +00:00
Alyssa Rosenzweig
15558873f4 pan/bi: Remove all-0's termination condition
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8139>
2020-12-21 21:54:50 +00:00
Alyssa Rosenzweig
b18855a0a1 pan/bi: Space out disassembly
Makes things much more legible with some "room to breathe".

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8139>
2020-12-21 21:54:50 +00:00
Alyssa Rosenzweig
3071f36cfb pan/bi: Allow toggling disassembly verbosity
Verbose mode is especially useful for debugging packing, but otherwise
just gets in the way I find.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8139>
2020-12-21 21:54:50 +00:00
Yevhenii Kolesnikov
5ad54d498c intel/fs: don't spill a register, set by undef
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3941
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8185>
2020-12-21 21:18:01 +00:00
Eric Anholt
bb4ade40e4 lvp: Fix vtn warnings about unsupported image read/write without format.
These are just warnings printed to the console and don't affect testcase
pass/fail, but clog up the deqp-runner job logs.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8188>
2020-12-21 20:33:35 +00:00
Eric Anholt
463dbbffa8 ci/deqp: Make sure that we pull in all board-specific xfail/skip/flake files.
When introducing/removing these files, it's easy to forget to update the
yml to point to them.  Instead of requiring the separate update, just have
the runner script pick the right one from a single per-gpu variable.

As a result, we now pick up the new deqp-lvp-skips.txt that was added but
not conected.  This also required moving some bypass flakes from the
shared a630 flakes list to a separate list, which is a feature because now
we'd notice the introduction of flakes to the gmem path.

Fixes: ab79e6b8e3 ("ci: skip failing test on lavapipe")
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8147>
2020-12-21 18:44:43 +00:00
Bas Nieuwenhuizen
9339ed2f85 radv: Enable DCC in the GENERAL layout on GFX10+.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Bas Nieuwenhuizen
18ddd48e70 radv: Disable DCC explicitly for incompatible copies.
If we enable DCC for GENERAL we cannot set the layout to GENERAL to
disable DCC, so do it explicitly.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Bas Nieuwenhuizen
f23eaf0db6 radv: Add option to disable DCC in renderpasses without layout.
If DCC is enabled for GENERAL then we cannot disable DCC by going
to the GENERAL layout.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Bas Nieuwenhuizen
88f392f6f8 radv: Never allow fast clears on DCC images that are not compressed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Bas Nieuwenhuizen
da36577558 radv: Don't skip layout transitions that only differ in render loop.
This can result in meaningful compression changes so we shouldn't skip.

Fixes: 66131ceb8b "radv: Pass through render loop detection to internal layout decisions."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Samuel Pitoiset
909e06075d radv: ignore the mutable bit for TC-compatible HTILE
All depth/stencil formats are incompatible each others, so the
mutable bit and the image format list can be ignored.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8126>
2020-12-21 17:46:03 +00:00
cheyang
ffe87c2689 glsl: remove unused state variable
Because compile_shader function state variable
not determine whether the compilation is successful.

Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8178>
2020-12-21 14:49:53 +00:00
Danylo Piliaiev
972e9ca294 freedreno/a6xx: bump varyings limit
GL_MAX_VARYING_COMPONENTS is bumped to 124 since it should
not include the components of gl_Position. (Same as in blob)

GL_MAX_*_OUTPUT_COMPONENTS is bumped to 128, only
GL_MAX_GEOMETRY_INPUT_COMPONENTS is 64. (Same as in blob)

Per GL 3.2 spec the minimum of:
 - GL_MAX_GEOMETRY_OUTPUT_COMPONENTS is 128
 - GL_MAX_FRAGMENT_INPUT_COMPONENTS is 128
 - others is 64

Per ARB_tessellation_shader the minimum of:
 - GL_MAX_TESS_CONTROL_*_COMPONENTS to be 128
 - GL_MAX_TESS_EVALUATION_*_COMPONENTS to be 128

Allows passing of:
 gl-3.2-minmax
 arb_tessellation_shader-minmax

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917>
2020-12-21 16:25:39 +02:00
Danylo Piliaiev
e5499ca2bf freedreno/a6xx: Fix SP_HS_UNKNOWN_A831 value and document it
It appears that storage for varyings in a wave has an upper
limit of wavesize * max_a831 where max_a831 is 64.
Exceeding the limit seam to force gpu to reduce primitives
processed per wave, at least calculations make sense with
such interpretation.

With blob SP_HS_UNKNOWN_A831 never exceeds 64 and setting
it to 65 in freedreno leads to a hang.

On A630 tests (patch_size=3 + gl_Position + array of vec4)
have shown such relation:

| Num of vec4 | A831 | PC_HS_INPUT_SIZE |
|-------------|------|------------------|
| 1           | 0x10 | 0xc              |
| 2           | 0x14 | 0xf              |
| 3           | 0x18 | 0x12             |
| 4           | 0x1c | 0x15             |
| 5           | 0x20 | 0x18             |
| 6           | 0x24 | 0x1b             |
| 7           | 0x28 | 0x1e             |
| 8           | 0x2c | 0x21             |
| 9           | 0x30 | 0x24             |
| 10          | 0x34 | 0x27             |
| 11          | 0x38 | 0x2a             |
| 12          | 0x3c | 0x2d             |
| 13          | 0x3f | 0x30             |
| 14          | 0x40 | 0x33             |
| 15          | 0x3d | 0x36             |
| 16          | 0x3d | 0x39             |
| 17          | 0x40 | 0x3c             |
| 18          | 0x3f | 0x3f             |
| 19          | 0x3e | 0x42             |
| 20          | 0x3d | 0x45             |
| 21          | 0x3f | 0x48             |
| 22          | 0x3d | 0x4b             |
| 23          | 0x40 | 0x4e             |
| 24          | 0x3d | 0x51             |
| 25          | 0x3f | 0x54             |
| 26          | 0x3c | 0x57             |
| 27          | 0x3e | 0x5a             |
| 28          | 0x40 | 0x5d             |
| 29          | 0x3c | 0x60             |
| 30          | 0x3e | 0x63             |
| 31          | 0x40 | 0x66             |
|-------------|------|------------------|

Brief tests with high patch sizes also confirm that formula
matches blob behaviour.

A831 is not a limit for storage available for one thread, so
naming it as SP_HS_WAVE_INPUT_SIZE would make more sense.

Fixes: 47e2c195 "freedreno/a6xx: Program state for tessellation stages"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917>
2020-12-21 16:25:34 +02:00
Danylo Piliaiev
22180137e9 ir3: Allow tesselation to use all 32 varying slots
POS, PSIZE, CLIP_DIST0, and CLIP_DIST1 have their own predefined
indices, map's size should take this into account.

Fixes: 9e063b01 "ir3: Switch tess lowering to use location"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917>
2020-12-21 16:06:20 +02:00
Danylo Piliaiev
4b208fa36b freedreno/a6xx: Fix assert which checks the count of shader outputs
The actual max count is 32 which corresponds to 128 output components.

Fixes: 2251a434 "freedreno/a6xx: Write multiple regs for SP_VS_OUT_REG and SP_VS_VPC_DST_REG"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917>
2020-12-21 16:06:20 +02:00
Tapani Pälli
296d8662dc mesa: fix layered framebuffer attachment target check
Current code was making the layer target checking for depth and stencil
attachments as well while the check in spec is specified only for color.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3980
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8102>
2020-12-21 07:47:44 +00:00
Dave Airlie
448e60314a lavapipe: add transform feedback support
This adds support for EXT_transform_feedback which can be used by
zink to enable more CI

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7981>
2020-12-21 01:12:42 +00:00