As we are already updating tmu_dirty_rcl based on the the
shader usage of tmu writes at v3d_emit_gl_shader_state we
can avoid setting it everytime we have a SSBO or image
attached.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36343>
Allows detecting if the queue ends up going idle due to
a cross-queue dependency. Since we're only considering delays from
specific queues, we would not be able to detect low-latency situations
arising from the start of a frame happening on async queues.
Until we observe real work happening for a queue in a frame context,
submit timestamps ahead of any other waits.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34242>
VkLayer_MESA_anti_lag is a lightweight implicit layer which provides
an open-source implementation of the VK_AMD_anti_lag vulkan extension.
The algorithm used by this layer is very simplistic and only aims to
minimize the delay between calls to vkQueueSubmit or vkQueueSubmit2
and the begin of the execution of the submission.
In order to build VkLayer_MESA_anti_lag, pass -Dlayers=anti-lag to meson.
It is possible to either install the layer or to use
VK_ADD_IMPLICIT_LAYER_PATH=<buildpath>/share/vulkan/implicit_layer.d/
for testing purposes.
(Keep in mind that you have to adjust the library_path in the json file in that case.)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34242>
Replace incorrect MIN2 clamping with proper 5.8 signed fixed point
encoding. The hardware expects LOD values in 5.8 format with a range
of -16.0 to +15.99609375. Clamp input values to this valid range
before conversion to handle overflow correctly.
Passes dEQP-GLES3.functional.texture.mipmap.*.max_lod.* on GC7000.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36303>
It crashes in LLVM when the type is not scalar integer.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
LLVM removed typed pointers a long time ago. These types and bitcasts
had no effect.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
The alignment change allows LLVM to select 32-bit stores when 8-bit and
16-bit stores are properly aligned.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
These are only memory loads.
We could do the same for LDS loads, which are not truly speculatable
in merged shaders (can't be moved before the barrier), but that's fine
because LICM only moves code out of loops, which can't have barriers.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
LLVM also generates better code with this.
(-0.51% code size in 153 shaders, less SGPR spilling)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
This pulls in the newest version of the file form
open-gpu-kernel-modules version 575.64.05. This should give us updated
names that correspond to our new hardware support.
The new version also added a ton of lines where the name was "(null)".
Since these would only make our device names more confusing, I've
removed all of these lines in the new version using a script that is
also included in this commit.
Backport-to: 25.2
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36333>
The old Nouveau GL driver has no support for GPUs after Ada. Instead,
users will always get NVK+Zink on Hopper+. Right now, if the user sets
NOUVEAU_USE_ZINK=false, the loader will return "nouveau" and EGL/GLX
will try to load that, fail, and then fall back to Zink. With this
patch, we instead print a warning message and then load Zink anyway.
Backport-to: 25.2
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36329>
When building for C23 the compiler warns about assigning boolean to
a different type.
Change the code fixing the following error:
-----------------------------------------------------------------------
../src/gallium/drivers/zink/zink_query.c: In function ‘find_or_allocate_qp’:
../src/gallium/drivers/zink/zink_query.c:213:25: error: incompatible types when assigning to type ‘_Bool *’ from type ‘_Bool’
213 | vkq_needs_reset = false;
| ^~~~~
-----------------------------------------------------------------------
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Fixes: 92811d9a56 ("zink: use maint9 implicit query resets when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36326>
This was the only meta function (including those built into honeykrisp)
which wasn't setting view usage so we can also assert that it's always
provided.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36301>
Keep the support in gen_sort_xml.py to allow it still convert
old MRs into the new format.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36138>
And change the gen_sort_xml.py script to default to the new format.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36138>
Change code to temporarily support both the start/end old format and the
dword/bits new format.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36138>
Add a `--bits-format` argument to normalize the output to either of the
formats described below. For now, defaults to the old format.
The documentation in PRMs and BSpec describe the fields with the dword
and the bit range. Using the same convention makes easier to spot
issues.
Old format:
```
<field name="Disable SLM Read Merge Optimization" start="38" end="38" type="bool" />
<field name="Pixel Async Compute Thread Limit" start="39" end="41" type="uint" prefix="PACTL">
```
New format:
```
<field name="Disable SLM Read Merge Optimization" dword="1" bits="6:6" type="bool" />
<field name="Pixel Async Compute Thread Limit" dword="1" bits="9:7" type="uint" prefix="PACTL">
```
For Groups, we store the dword and if needed a offset_bits, in case
a group starts in a non-aligned position. Size and count for groups are
not changed.
Do this first for gen_sort_tags.py in case is convenient to have for the
stable tree to convert future patches from the new back into the old
format. Later patches will add support to the rest of the code.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36138>
Avoid noise when changing to the new GenXML field format -- which would
try to also sort it. Also add this file to be checked as part of tests.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36138>
