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radeonsi: add a workaround for gfx10.3-11 corruption with R9G9B9E5_FLOAT

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35950>
This commit is contained in:
Marek Olšák 2025-06-21 11:21:09 -04:00 • committed by Marge Bot
parent 30acb5a14d
commit 68bcc0ef5d
1 changed files with 24 additions and 2 deletions
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26
src/gallium/drivers/radeonsi/si_state.c
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@ -222,8 +222,30 @@ static void si_emit_cb_render_state(struct si_context *sctx, unsigned index)
break;
case V_028C70_COLOR_5_9_9_9:
if (spi_format == V_028714_SPI_SHADER_FP16_ABGR)
sx_ps_downconvert |= V_028754_SX_RT_EXPORT_9_9_9_E5 << (i * 4);
/* This only executes on GFX10.3+. */
if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) {
if (sctx->gfx_level >= GFX12) {
sx_ps_downconvert |= V_028754_SX_RT_EXPORT_9_9_9_E5 << (i * 4);
} else {
/* GFX10.3-11 have a bug where R9G9B9E5 is broken with RB+ when the color mask is not
* full or empty.
*
* If A is missing in the color mask, add it. If it's the only bit set, remove it.
*/
if (colormask == BITFIELD_MASK(3))
cb_target_mask |= BITFIELD_BIT(3) << (i * 4);
else if (colormask == BITFIELD_BIT(3))
cb_target_mask &= ~(BITFIELD_BIT(3) << (i * 4));
colormask = (cb_target_mask >> (i * 4)) & 0xf;
/* Don't enable RB+ if the color mask is not full or empty, which is done by not
* setting SX_PS_DOWNCONVERT for that MRT.
*/
if (colormask == 0xf || colormask == 0)
sx_ps_downconvert |= V_028754_SX_RT_EXPORT_9_9_9_E5 << (i * 4);
}
}
break;
}
}