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Author SHA1 Message Date
Qiang Yu
2e1092095a ac/nir,radv: add 1 dword to LS/HS vertex stride 
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
 2023-06-09 02:05:20 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs 
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
 2023-06-08 00:37:03 +00:00
Daniel Schürmann
1be3a558f2 radv: add remaining RT shader args for separate compilation 
Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
 2023-06-08 00:37:03 +00:00
Yogesh Mohan Marimuthu
7761e93c8c ac/gpu_info: rearrange if checks for dcc config 
rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
 2023-06-07 19:28:29 +00:00
Yogesh Mohan Marimuthu
6f968f46fe ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile 
With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
 2023-06-07 19:28:29 +00:00
Samuel Pitoiset
958cc87954 radv: add support for nir_intrinsic_load_provoking_vtx_amd 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
 2023-06-07 14:40:35 +00:00
Rhys Perry
62f023f6cf ac/nir: use scoped barriers to finish stores before exports 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
 2023-06-07 13:19:41 +00:00
Marek Olšák
218c00319b amd: remove unused PKT0 definitions 
We never use type 0 packets.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:36 +00:00
Marek Olšák
dd5604b94d radeonsi: don't use SET_SH_REG_INDEX if the kernel doesn't use CU reservation 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:36 +00:00
Marek Olšák
52ca879cdd radeonsi: export non-zero edgeflags for GS and tess 
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
ed8250360f amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
192b2c7c31 ac/nir/ngg: always use load_initial_edgeflags_amd, choose the value in drivers 
radeonsi will have a more complicated condition here

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d6e70334ff ac/surface: fix R32G3B32 image format regression for gfx6-8 
This is a different fix from the one reviewed because that one broke gfx9.

Fixes: ea7c89d1f5 - ac/surface: move determing ADDR_FMT_* into a helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Erik Faye-Lund
6d142078bc nir: use generated immediate comparison helpers 
This makes the code a bit less verbose, so let's use the helpers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
 2023-06-05 13:40:08 +00:00
Erik Faye-Lund
28b1c5bca1 nir: use nir_i{ne,eq}_imm helpers 
We already have these, so let's use them more.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
 2023-06-05 13:40:07 +00:00
Yonggang Luo
12256136e0 compiler: Rename shader_prim to mesa_prim and replace all usage of pipe_prim_type with mesa_prim 
This is a prepare step to remove depends on p_defines.h in src/util/*

This is done by:
replace pipe_prim_type with mesa_prim
replace shader_prim with mesa_prim
replace PIPE_PRIM_MAX  with MESA_PRIM_COUNT
replace SHADER_PRIM_  with MESA_PRIM_
replace PIPE_PRIM_ with MESA_PRIM_

This patch only replace code only

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
 2023-06-03 03:29:03 +00:00
Qiang Yu
c5c98d2f20 ac/nir/ngg: don't use 8bit alu ops 
aco doesn't support 8bit alu ops and radeonsi won't
call nir_lower_bit_size for most alu ops, so just
don't use 8bit alu ops (they will be lowered to 32bit
anyway if we do).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:58 +00:00
Marek Olšák
7d066330e0 ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+ 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00
Marek Olšák
10c45fcc3f ac/nir: handle DEPTH as PITCH in ac_nir_lower_resinfo 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00
Marek Olšák
d715631623 ac/surface: fix is_linear for stencil-only surfaces 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00
Chia-I Wu
0bba0eb0df ac, radeonsi: add and use ac_get_ps_iter_mask 
It is more natural for ac_get_ps_iter_mask to take sample count.
Replace samplemask_log_ps_iter by ps_iter_smples in
ac_nir_lower_ps_options accordingly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23265>
 2023-05-30 16:35:30 +00:00
Samuel Pitoiset
01bd012edd amd: fix 64-bit integer color image clears 
Fixes recent CTS dEQP-VK.api.image_clearing.*r64* since the Vulkan
specification has been clarified.

Only VK_FORMAT_R64_{UINT,SINT} are supported.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23250>
 2023-05-29 07:54:38 +02:00
Marek Olšák
038fb6573a radeonsi: remove the gl_SampleMask FS output if MSAA is disabled 
It's better to remove the output than what the previous code did,
which only unset MASK_EXPORT_ENABLE.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
 2023-05-26 23:27:59 -04:00
Marek Olšák
ea7c89d1f5 ac/surface: move determing ADDR_FMT_* into a helper function 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
 2023-05-26 23:27:59 -04:00
Marek Olšák
78d5626d17 ac/surface: move CB format translation helpers here 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
 2023-05-26 23:27:50 -04:00
Marek Olšák
8642740aef ac/gpu_info: give has_msaa_sample_loc_bug a more accurate name 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
 2023-05-26 23:17:40 -04:00
Rohan Garg
c2d0662eb8 ac/surface: make sure alignment is a POT 
Signed-off-by: Rohan Garg <rohan@garg.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
 2023-05-25 21:24:45 +00:00
Rhys Perry
0d26d9d9b6 ac/nir: add fix_derivs_in_divergent_cf 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
 2023-05-25 16:29:16 +00:00
Rhys Perry
3efaaf130a ac/nir: round layer in ac_nir_lower_tex 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
 2023-05-25 16:29:16 +00:00
Rhys Perry
1f86be7f8e ac/nir: add pass for lowering 1d/cube coordinates 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
 2023-05-25 16:29:16 +00:00
Marek Olšák
e18344dd24 ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT 
excluding: aco, radv, addrlib

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23113>
 2023-05-24 21:48:19 +00:00
Filip Gawin
e367617668 ac/nir: fix slots in clamping legacy colors 
fixes: 7c41cdb81f

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23178>
 2023-05-23 21:28:55 +00:00
Chia-I Wu
4f1c43d38e ac/surface: print tile_swizzle as well 
swizzle modes that are *_X or *_T depend on tile_swizzle.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23143>
 2023-05-22 20:14:22 +00:00
Marek Olšák
dbc1febb33 ac/surface: add ac_surf_config::is_array 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Marek Olšák
78088ebaea ac/surface: fix overridden linear pitch for CPU access 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Marek Olšák
3f5723a23f ac/surface: validate overridden pitch for all chips 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Marek Olšák
f449ff426f ac/surface: define LINEAR_PITCH_ALIGNMENT 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Marek Olšák
4705148c5e ac/surface: clean up and move the PIPE_CONFIG helper to ac_surface.c 
This will be used by following commits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Marek Olšák
cbc6bf8218 ac/surface: fix address calculation for large images by using uint64_t 
also rename gfx9_surf_level -> gfx9_surf_meta_level

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
 2023-05-19 02:58:48 +00:00
Timur Kristóf
51d3e08bf9 ac: Use const keyword for some function arguments. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23053>
 2023-05-18 14:30:45 +00:00
Alyssa Rosenzweig
01e9ee79f7 nir: Drop unused name from nir_ssa_dest_init 
Since 624e799cc3 ("nir: Drop nir_ssa_def::name and nir_register::name"), SSA
defs don't have names, making the name argument unused. Drop it from the
signature and fix the call sites. This was done with the help of the following
Coccinelle semantic patch:

    @@
    expression A, B, C, D, E;
    @@

    -nir_ssa_dest_init(A, B, C, D, E);
    +nir_ssa_dest_init(A, B, C, D);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23078>
 2023-05-17 23:46:16 +00:00
Alyssa Rosenzweig
ec0c9706f0 ac: Produce unified atomic 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Qiang Yu
4b90347595 ac/binary: pack prefech align code to a function 
To be used by radeonsi raw shader binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
 2023-05-15 02:01:10 +00:00
Marek Olšák
f98871608c ac/llvm: rewrite and unify how GLC, DLC, SLC are set 
Use ACCESS_* flags in call sites instead of GLC/DLC/SLC.

ACCESS_* flags are extended to describe other aspects of memory instructions
like load/store/atomic/smem.

Then add a function that converts the access flags to GLC, DLC, SLC.

The new functions are also usable by ACO.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22770>
 2023-05-12 21:45:44 +00:00
Alyssa Rosenzweig
ce638eafe2 aco,radv: Use unified atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
 2023-05-12 20:39:46 +00:00
Leo Liu
ffbbf23ef8 radeonsi: Use vcn version instead of CHIP family for VCNs 
Decouple it from CHIP family, based on HW query infomation.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
 2023-05-11 18:01:10 +00:00
Leo Liu
09e59553ec amd: Add vcn ip version info 
And make it support for kernel w/wo ip_discovery.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
 2023-05-11 18:01:10 +00:00
Leo Liu
82a064020c radeonsi: Remove redundant vcn_decode from info 
Use the number of queue instead.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
 2023-05-11 18:01:10 +00:00
Jiadong Zhu
3cfdcabc78 ac: enable SHADOW_GLOBAL_CONFIG for preemptible ib 
SHADOW_GLOBAL_CONFIG is mandatory for mid command buffer preemmption.

Fixes: 69014d8c94 (radeonsi: implement CP register shadowing)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22916>
 2023-05-10 17:11:19 +00:00
Samuel Pitoiset
787ae18a37 ac/spm: switch to SPM version 2.0 
Found this while glancing in PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22817>
 2023-05-09 11:25:18 +00:00