ac/surface: add ac_surf_config::is_array

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
This commit is contained in:
Marek Olšák 2023-05-15 01:25:43 -04:00 committed by Marge Bot
parent 78088ebaea
commit dbc1febb33
4 changed files with 9 additions and 0 deletions

View file

@ -419,6 +419,7 @@ struct ac_surf_config {
unsigned is_1d : 1;
unsigned is_3d : 1;
unsigned is_cube : 1;
unsigned is_array : 1;
};
/* Output parameters for ac_surface_compute_nbc_view */

View file

@ -91,6 +91,8 @@ radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws, const struct ac_surf_
config.is_1d = type == RADEON_SURF_TYPE_1D || type == RADEON_SURF_TYPE_1D_ARRAY;
config.is_3d = type == RADEON_SURF_TYPE_3D;
config.is_cube = type == RADEON_SURF_TYPE_CUBEMAP;
config.is_array = type == RADEON_SURF_TYPE_1D_ARRAY ||
type == RADEON_SURF_TYPE_2D_ARRAY;
return ac_compute_surface(ws->addrlib, &ws->info, &config, mode, surf);
}

View file

@ -93,6 +93,9 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
tex->target == PIPE_TEXTURE_1D_ARRAY;
config.is_3d = tex->target == PIPE_TEXTURE_3D;
config.is_cube = tex->target == PIPE_TEXTURE_CUBE;
config.is_array = tex->target == PIPE_TEXTURE_1D_ARRAY ||
tex->target == PIPE_TEXTURE_2D_ARRAY ||
tex->target == PIPE_TEXTURE_CUBE_ARRAY;
/* Use different surface counters for color and FMASK, so that MSAA MRTs
* always use consecutive surface indices when FMASK is allocated between

View file

@ -425,6 +425,9 @@ static int radeon_winsys_surface_init(struct radeon_winsys *rws,
config.info.array_size = tex->array_size;
config.is_3d = !!(tex->target == PIPE_TEXTURE_3D);
config.is_cube = !!(tex->target == PIPE_TEXTURE_CUBE);
config.is_array = tex->target == PIPE_TEXTURE_1D_ARRAY ||
tex->target == PIPE_TEXTURE_2D_ARRAY ||
tex->target == PIPE_TEXTURE_CUBE_ARRAY;
si_compute_cmask(&ws->info, &config, surf_ws);
}