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ac/surface: clean up and move the PIPE_CONFIG helper to ac_surface.c
This will be used by following commits. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
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commit
4705148c5e
3 changed files with 30 additions and 47 deletions
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@ -26,6 +26,7 @@
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#include "ac_gpu_info.h"
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#include "ac_shader_util.h"
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#include "ac_debug.h"
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#include "ac_surface.h"
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#include "addrlib/src/amdgpu_asic_addr.h"
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#include "sid.h"
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@ -350,52 +351,6 @@ static const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
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#define CIK_TILE_MODE_COLOR_2D 14
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#define CIK__GB_TILE_MODE__PIPE_CONFIG(x) (((x) >> 6) & 0x1f)
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#define CIK__PIPE_CONFIG__ADDR_SURF_P2 0
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#define CIK__PIPE_CONFIG__ADDR_SURF_P4_8x16 4
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#define CIK__PIPE_CONFIG__ADDR_SURF_P4_16x16 5
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#define CIK__PIPE_CONFIG__ADDR_SURF_P4_16x32 6
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#define CIK__PIPE_CONFIG__ADDR_SURF_P4_32x32 7
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x16_8x16 8
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_8x16 9
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_8x16 10
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_16x16 11
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x16 12
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x32 13
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#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x64_32x32 14
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#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16 16
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#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16 17
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static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info)
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{
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unsigned mode2d = info->gb_tile_mode[CIK_TILE_MODE_COLOR_2D];
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switch (CIK__GB_TILE_MODE__PIPE_CONFIG(mode2d)) {
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case CIK__PIPE_CONFIG__ADDR_SURF_P2:
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return 2;
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case CIK__PIPE_CONFIG__ADDR_SURF_P4_8x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P4_16x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P4_16x32:
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case CIK__PIPE_CONFIG__ADDR_SURF_P4_32x32:
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return 4;
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x16_8x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_8x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_8x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_16x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x32:
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case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x64_32x32:
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return 8;
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case CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16:
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case CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16:
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return 16;
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default:
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fprintf(stderr, "Invalid GFX7 pipe configuration, assuming P2\n");
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assert(!"this should never occur");
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return 2;
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}
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}
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static bool has_syncobj(int fd)
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{
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uint64_t value;
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@ -1129,7 +1084,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info)
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info->num_tile_pipes = 1 << G_0098F8_NUM_PIPES(info->gb_addr_config);
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info->pipe_interleave_bytes = 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(info->gb_addr_config);
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} else {
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info->num_tile_pipes = cik_get_num_tile_pipes(&amdinfo);
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unsigned pipe_config = G_009910_PIPE_CONFIG(amdinfo.gb_tile_mode[CIK_TILE_MODE_COLOR_2D]);
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info->num_tile_pipes = ac_pipe_config_to_num_pipes(pipe_config);
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info->pipe_interleave_bytes = 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(info->gb_addr_config);
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}
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info->r600_has_virtual_memory = true;
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@ -96,6 +96,32 @@ struct ac_addrlib {
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simple_mtx_t lock;
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};
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unsigned ac_pipe_config_to_num_pipes(unsigned pipe_config)
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{
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switch (pipe_config) {
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case V_009910_ADDR_SURF_P2:
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return 2;
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case V_009910_ADDR_SURF_P4_8x16:
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case V_009910_ADDR_SURF_P4_16x16:
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case V_009910_ADDR_SURF_P4_16x32:
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case V_009910_ADDR_SURF_P4_32x32:
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return 4;
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case V_009910_ADDR_SURF_P8_16x16_8x16:
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case V_009910_ADDR_SURF_P8_16x32_8x16:
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case V_009910_ADDR_SURF_P8_32x32_8x16:
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case V_009910_ADDR_SURF_P8_16x32_16x16:
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case V_009910_ADDR_SURF_P8_32x32_16x16:
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case V_009910_ADDR_SURF_P8_32x32_16x32:
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case V_009910_ADDR_SURF_P8_32x64_32x32:
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return 8;
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case V_009910_ADDR_SURF_P16_32x32_8x16:
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case V_009910_ADDR_SURF_P16_32x32_16x16:
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return 16;
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default:
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unreachable("invalid pipe_config");
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}
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}
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bool ac_modifier_has_dcc(uint64_t modifier)
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{
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return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier);
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@ -440,6 +440,7 @@ int ac_compute_surface(struct ac_addrlib *addrlib, const struct radeon_info *inf
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const struct ac_surf_config *config, enum radeon_surf_mode mode,
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struct radeon_surf *surf);
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void ac_surface_zero_dcc_fields(struct radeon_surf *surf);
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unsigned ac_pipe_config_to_num_pipes(unsigned pipe_config);
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void ac_surface_apply_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf,
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uint64_t tiling_flags, enum radeon_surf_mode *mode);
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