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ac/surface: make sure alignment is a POT

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Signed-off-by: Rohan Garg <rohan@garg.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
This commit is contained in:
Rohan Garg 2022-12-20 16:19:24 +01:00 • committed by Marge Bot
parent 14dec0c147
commit c2d0662eb8
1 changed files with 6 additions and 3 deletions
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9
src/amd/common/ac_surface.c
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@ -1773,11 +1773,14 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
surf->surf_size = out.surfSize;
surf->surf_alignment_log2 = util_logbase2(out.baseAlign);
const int linear_alignment =
util_next_power_of_two(LINEAR_PITCH_ALIGNMENT / surf->bpe);
if (!compressed && surf->blk_w > 1 && out.pitch == out.pixelPitch &&
surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR) {
/* Adjust surf_pitch to be in elements units not in pixels */
surf->u.gfx9.surf_pitch = align(surf->u.gfx9.surf_pitch / surf->blk_w,
LINEAR_PITCH_ALIGNMENT / surf->bpe);
linear_alignment);
surf->u.gfx9.epitch =
MAX2(surf->u.gfx9.epitch, surf->u.gfx9.surf_pitch * surf->blk_w - 1);
/* The surface is really a surf->bpe bytes per pixel surface even if we
@ -1790,11 +1793,11 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
(uint64_t)surf->u.gfx9.surf_pitch * out.height * surf->bpe * surf->blk_w);
surf->surf_size = surf->u.gfx9.surf_slice_size * in->numSlices;
int alignment = LINEAR_PITCH_ALIGNMENT / surf->bpe;
for (unsigned i = 0; i < in->numMipLevels; i++) {
surf->u.gfx9.offset[i] = mip_info[i].offset;
/* Adjust pitch like we did for surf_pitch */
surf->u.gfx9.pitch[i] = align(mip_info[i].pitch / surf->blk_w, alignment);
surf->u.gfx9.pitch[i] = align(mip_info[i].pitch / surf->blk_w,
linear_alignment);
}
surf->u.gfx9.base_mip_width = surf->u.gfx9.surf_pitch;
} else if (in->swizzleMode == ADDR_SW_LINEAR) {