Previously the code only handled scalars and vectors. This new code
is modeled somewhat after similar code in ir_to_mesa.
Reviewed-by: Eric Anholt <eric@anholt.net>
R6XX GPU doesn't like to have two partial flush writting
back to memory in row without a prior flush of the pipeline.
Add PS_PARTIAL_FLUSH to flush all work between the CP and
the ES, GS, VS, PS shaders.
Thanks a lot to Alban Browaeys (prahal on irc) for investigating
this issue.
Signed-off-by: Alban Browaeys <prahal@yahoo.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
gen6 builtin RSQ apparently clamps negative values to 0 instead of
returning the RSQ of the absolute value like ARB_fragment_program
desires and pre-gen6 apparently does.
Fixes:
glean/fp1-RSQ test 2 (reciprocal square root of negative value)
glean/vp1-RSQ test 2 (reciprocal square root of negative value)
Fixes this GCC warning.
r200_maos_arrays.c: In function 'r200EmitArrays':
r200_maos_arrays.c:113: warning: 'emitsize' may be used uninitialized in this function
It's not always possible to preprocess the content of 3D_LOAD_VBPNTR
in a command buffer, because the offset to all vertex buffers (which
the packet depends on) is derived from the "start" parameter of draw_arrays
and the "indexBias" parameter of draw_elements, but we can at least lazily
make a command buffer for the case when offset == 0, which should occur
most of the time.
The original lazy built-in importing patch did not add the newly created
function to the symbol table, nor actually emit it into the IR stream.
Adding it to the symbol table is non-trivial since importing occurs when
generating some ir_call in a nested scope. A new add_global_function
method, backed by new symbol_table code in the previous patch, handles
this.
Fixes bug #32030.
Avoid rebuilding constant shader state at each draw call,
factor out spi update that might change at each draw call.
Best would be to update spi only when revealent states
change (likely only flat shading & sprite point).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Vertex elements change are less frequent than draw call, those to
avoid rebuilding fetch shader to often build the fetch shader along
vertex elements. This also allow to move vertex buffer setup out
of draw path and make update to it less frequent.
Shader update can still be improved to only update SPI regs (based
on some rasterizer state like flat shading or point sprite ...).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
More than 1023 temporaries were being used for a Cinebench shader before
doing temporary optimization, causing the index value to wrap around to
-1024.
In st_finalize_texture() we were looking at the st_texture_object::
lastLevel field instead of the pipe_resource::last_level field to
determine which resource to store the mipmap in.
Then, in st_generate_mipmap() we need to call st_finalize_texture() to
make sure the destination resource is properly allocated.
These changes fix the broken piglit fbo-generatemipmap-formats test.
When X or Y or Z is close to W the outcome of the floating point clip
test comparision may be different between the C and x86 asm paths.
That's OK; don't report an error.
See fd.o bug 32093
It was only used for gen6 fragment programs (not GLSL shaders) at this
point, and it was clearly unsuited to the task -- missing opcodes,
corrupted texturing, and assertion failures hit various applications
of all sorts. It was easier to patch up the non-glsl for remaining
gen6 changes than to make brw_wm_glsl.c complete.
Bug #30530
Since the 8-wide first-quarter and 16-wide first-half have the same
bit encoding, we now need to track "do you want instruction
compression" in the compile state.
The FS backend is fine with register level granularity. But for the
brw_wm_emit.c backend, it expects pairs of regs to be used for the
constants, because the whole world is pairs of regs. If an odd number
got used, we went looking for interpolation in the wrong place.
In the SF and brw_fs.cpp fixes to set up interpolation sanely on gen6,
the setup for 16-wide interpolation was left behind. This brings
relative sanity to that path too.
Payload reg setup on gen6 depends more on the dispatch width as well
as the uses_depth, computes_depth, and other flags. That's something
we want to decide at compile time, not at cache lookup. As a bonus,
the fragment shader program cache lookup should be cheaper now that
there's less to compute for the hash key.
The preprocessor magic in mapi was nothing but obfuscation. Rewrite
mapi_abi.py to generate real C code.
This commit removes the hack added in
43121f2086.
Need to check the required primitive type for GS on Sandybridge,
and when GS is disabled, the new state has to be issued too, instead
of only updating URB state with no GS entry, that caused hang on Sandybridge.
This fixes hang issue during conformance suite testing.
