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i965: Fix up 16-wide gen6 FB writes after various refactoring.

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This commit is contained in:
Eric Anholt 2010-12-03 12:20:02 -08:00
parent ad35528944
commit d1ead22d1b
1 changed files with 8 additions and 9 deletions
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17
src/mesa/drivers/dri/i965/brw_wm_emit.c
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@ -1416,7 +1416,6 @@ void emit_fb_write(struct brw_wm_compile *c,
struct intel_context *intel = &brw->intel;
GLuint nr = 2;
GLuint channel;
int base_reg; /* For gen6 fb write with no header, starting from color payload directly!. */
/* Reserve a space for AA - may not be needed:
*/
@ -1428,11 +1427,6 @@ void emit_fb_write(struct brw_wm_compile *c,
*/
brw_push_insn_state(p);
if (intel->gen >= 6)
base_reg = nr;
else
base_reg = 0;
for (channel = 0; channel < 4; channel++) {
if (intel->gen >= 6) {
/* gen6 SIMD16 single source DP write looks like:
@ -1524,15 +1518,20 @@ void emit_fb_write(struct brw_wm_compile *c,
}
if (intel->gen >= 6) {
/* Subtract off the message header, since we send headerless. */
nr -= 2;
/* Load the message header. There's no implied move from src0
* to the base mrf on gen6.
*/
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, brw_message_reg(0), brw_vec8_grf(0, 0));
brw_pop_insn_state(p);
}
if (!c->runtime_check_aads_emit) {
if (c->aa_dest_stencil_reg)
emit_aa(c, arg1, 2);
fire_fb_write(c, base_reg, nr, target, eot);
fire_fb_write(c, 0, nr, target, eot);
}
else {
struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));