Commit graph

82384 commits

Author SHA1 Message Date
Jason Ekstrand
7ef3e47c27 Merge commit '85f5c18fef1ff2f19d698f150e23a02acd6f59b9' into vulkan 2016-02-10 17:09:56 -08:00
Kristian Høgsberg Kristensen
d2623a3247 anv: Handle dwords that are all MBZ correctly
A few packets have dwords in them that are all MBZ and we failed to
write those. This change makes sure we iterate through all dwords and
write them all.
2016-02-10 16:36:47 -08:00
Jason Ekstrand
8750299a42 nir: Remove the const_offset from nir_tex_instr
When NIR was originally drafted, there was no easy way to determine if
something was constant or not.  The result was that we had lots of
special-casing for constant values such as this.  Now that load_const
instructions are SSA-only, it's really easy to find constants and this
isn't really needed anymore.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@gmail.com>
2016-02-10 16:33:50 -08:00
Jason Ekstrand
70dff4a55e nir/lower_vec_to_movs: Better report channels handled by insert_mov
This fixes two issues.  First, we had a use-after-free in the case where
the instruction got deleted and we tried to return mov->dest.write_mask.
Second, in the case where we are doing a self-mov of a register, we delete
those channels that are moved to themselves from the write-mask.  This
means that those channels aren't reported as being handled even though they
are.  We now stash off the write-mask before remove unneeded channels so
that they still get reported as handled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94073
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2016-02-10 16:33:14 -08:00
Kristian Høgsberg Kristensen
09bb7ea4b7 anv: Fix out-of-tree build
We need to be able to find the generated nir_opcodes.h header.
2016-02-10 15:54:28 -08:00
Kristian Høgsberg Kristensen
9cc939d82f nir: Fix out-of-tree build for spirv2nir
This needs to be able to find the generated nir_opcodes.h header.
2016-02-10 15:54:28 -08:00
Jason Ekstrand
9be5a4bc29 nir/spirv: Fix handling of OpGroupMemberDecorate
We were pulling the member index from the wrong dword
2016-02-10 15:36:42 -08:00
Jason Ekstrand
ac04c6de2c nir/spirv: Assert that struct member ids are in-bounds 2016-02-10 15:36:41 -08:00
Marek Olšák
6ee1c386fe radeonsi: don't emit unnecessary NULL exports for unbound targets (v3)
v2: remove semantic index == 0 checks
    add the else statement to remove shadowing of args
v3: fix fbo-alphatest-nocolor regression

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
2016-02-10 23:53:17 +01:00
Mark Janes
8179834030 nir/spirv: fix build_mat_subdet stack smasher
The sub-determinate implementation pattern fixed by
6a7e2904e0 has a second instance in the
same file.

With the previous algorithm, when row and j are both 3, the index
overruns the array.  This only impacts the stack on 32 bit builds.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-10 14:43:03 -08:00
Kristian Høgsberg Kristensen
51c01e292c anv: Generate pack headers from XML definition
This huge commit switches us over to using a simple xml format (genxml)
for defining our command streamer commands and a python script for
generating the pack headers we use in the driver.
2016-02-10 14:31:26 -08:00
Ben Widawsky
088280e022 i965: Make sure we blit a full compressed block
This fixes an assertion failure in [at least] one of the Unreal Engine Linux
demo/games that uses DXT1 compression. Specifically, the "Vehicle Game".

At some point, the game ends up trying to blit mip level whose size is 2x2,
which is smaller than a DXT1 block. As a result, the assertion in the blit path
is triggered. It should be safe to simply make sure we align the width and
height, which is sadly an example of compression being less efficient.

NOTE: The demo seems to work fine without the assert, and therefore release
builds of mesa wouldn't stumble over this. Perhaps there is some unnoticeable
corruption, but I had trouble spotting it.

Thanks to Jason for looking at my backtrace and figuring out what was going on.

v2: Use NPOT alignment to make sure ASTC is handled properly (Ilia)
Remove comment about how this doesn't fix other bugs, because it does.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93358
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-10 14:08:46 -08:00
Marek Olšák
79d0082c64 radeon/uvd: silence a warning 2016-02-10 20:16:17 +01:00
Marek Olšák
d9c8a8fe61 r300g: silence warnings 2016-02-10 20:16:17 +01:00
Ian Romanick
0ecc9d907e meta/decompress: Don't pollute the renderbuffer namespace
tl;dr: For many types of GL object, we can *NEVER* use the Gen function.

In OpenGL ES (all versions!) and OpenGL compatibility profile,
applications don't have to call Gen functions.  The GL spec is very
clear about how you can mix-and-match generated names and non-generated
names: you can use any name you want for a particular object type until
you call the Gen function for that object type.

Here's the problem scenario:

 - Application calls a meta function that generates a name.  The first
   Gen will probably return 1.

 - Application decides to use the same name for an object of the same
   type without calling Gen.  Many demo programs use names 1, 2, 3,
   etc. without calling Gen.

 - Application calls the meta function again, and the meta function
   replaces the data.  The application's data is lost, and the app
   fails.  Have fun debugging that.

Fixes piglit 'object-namespace-pollution glGetTexImage-compressed
renderbuffer' test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:55 -08:00
Ian Romanick
3aeff21fbf meta: Use internal functions for renderbuffer access
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:53 -08:00
Ian Romanick
4087c17832 meta/decompress: Track renderbuffer using gl_renderbuffer instead of GL API object handle
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:50 -08:00
Ian Romanick
47a5aa4bfa i965/meta: Don't pollute the renderbuffer namespace
tl;dr: For many types of GL object, we can *NEVER* use the Gen function.

In OpenGL ES (all versions!) and OpenGL compatibility profile,
applications don't have to call Gen functions.  The GL spec is very
clear about how you can mix-and-match generated names and non-generated
names: you can use any name you want for a particular object type until
you call the Gen function for that object type.

Here's the problem scenario:

 - Application calls a meta function that generates a name.  The first
   Gen will probably return 1.

 - Application decides to use the same name for an object of the same
   type without calling Gen.  Many demo programs use names 1, 2, 3,
   etc. without calling Gen.

 - Application calls the meta function again, and the meta function
   replaces the data.  The application's data is lost, and the app
   fails.  Have fun debugging that.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:47 -08:00
Ian Romanick
03506c9ef1 i965/meta: Use internal functions for renderbuffer access
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:44 -08:00
Ian Romanick
4c6b0e017c i965/meta: Return struct gl_renderbuffer* from brw_get_rb_for_slice instead of GL API handle
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:42 -08:00
Ian Romanick
ab2b631703 meta: Don't save or restore the renderbuffer binding
Nothing left in meta does anything with the RBO binding, so we don't
need to save or restore it.  The FBO binding is still modified.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:40 -08:00
Ian Romanick
e273bbd60b meta: Use _mesa_CreateRenderbuffers instead of _mesa_GenRenderbuffers and _mesa_BindRenderbuffer
This has the advantage that it does not pollute the global binding
state.  It also enables later patches that will stop calling
_mesa_GenRenderbuffers / _mesa_CreateRenderbuffers which pollute the
renderbuffer namespace.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:36 -08:00
Ian Romanick
1e055e9211 i965/meta: Use _mesa_CreateRenderbuffers instead of _mesa_GenRenderbuffers and _mesa_BindRenderbuffer
This has the advantage that it does not pollute the global binding
state.  It also enables later patches that will stop calling
_mesa_GenRenderbuffers / _mesa_CreateRenderbuffers which pollute the
renderbuffer namespace.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:33 -08:00
Ian Romanick
eb5bc62e97 mesa: Refactor renderbuffer_storage to make _mesa_renderbuffer_storage
Pulls the parts of renderbuffer_storage that aren't just parameter
validation out into a function that can be called from other parts of
Mesa (e.g., meta).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:31 -08:00
Ian Romanick
9ae42ab1ec mesa: Refactor _mesa_framebuffer_renderbuffer
This function previously was only used in fbobject.c and contained a
bunch of API validation.  Split the function into
framebuffer_renderbuffer that is static and contains the validation, and
_mesa_framebuffer_renderbuffer that is suitable for calling from
elsewhere in Mesa (e.g., meta).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:28 -08:00
Marek Olšák
7aedbbacae radeonsi: put image, fmask, and sampler descriptors into one array
The texture slot is expanded to 16 dwords containing 2 descriptors.
Those can be:
- Image and fmask, or
- Image and sampler state

By carefully choosing the locations, we can put all three into one slot,
with the fmask and sampler state being mutually exclusive.

This improves shaders in 2 ways:
- 2 user SGPRs are unused, shaders can use them as temporary registers now
- each pair of descriptors is always on the same cache line

v2: cosmetic changes: add back v8i32, don't load a sampler state & fmask
    at the same time

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-10 19:41:49 +01:00
Marek Olšák
796ee76e2e winsys/radeon: fix the num_tile_pipes comment to silence warnings 2016-02-10 19:41:49 +01:00
Alexandre Demers
111602e159 winsys/radeon: better explain the num_tile_pipes fixup for TAHITI (v2)
v2: Clarify the relation between num_tiles_pipes and GB_TILE_MODE and the fix
 needed for Tahiti as suggested by Marek.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-02-10 19:29:41 +01:00
Samuel Pitoiset
5e8db898fd st/mesa: check ureg_create() retval in create_pbo_upload_vs()
This avoids a possible NULL dereference because ureg_create() might
return a NULL pointer.

Spotted by coverity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-10 18:26:20 +01:00
Bernhard Rosenkränzer
e86ba7844f freedreno/ir3: Get rid of nested functions
This allows building Freedreno with clang

Signed-off-by: Bernhard Rosenkränzer <bero@linaro.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-10 11:26:48 -05:00
Chris Forbes
43d23e879c i965/blorp: Fix hiz ops on MSAA surfaces
Two things were broken here:
- The depth/stencil surface dimensions were broken for MSAA.
- Sample count was programmed incorrectly.

Result was the depth resolve didn't work correctly on MSAA surfaces, and
so sampling the surface later produced garbage.

Fixes the new piglit test arb_texture_multisample-sample-depth, and
various artifacts in 'tesseract' with msaa=4 glineardepth=0.

Fixes freedesktop bug #76396.

Not observed any piglit regressions on Haswell.

v2: Just set brw_hiz_op_params::dst.num_samples rather than adding a
    helper function (Ken).

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

v3: moved the alignment needed for hiz+msaa to brw_blorp.cpp, as
    suggested by Chad Versace (Alejandro Piñeiro on behalf of Chris
    Forbes)

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>

Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>

Tested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-10 09:00:05 +01:00
Topi Pohjolainen
878b2b8964 i965/gen8: Remove dead assertion
The assertion is inside a condition mandating num_samples > 1 and
therefore the first half of the constraint is always met. The
second half in turn would only be applicable for single sampled
case and moreover it is trying to falsely check against surface
type instead of format.
Subsequent patches will introduce proper support for the lossless
compression and dropping this here makes the patches a little
simpler.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-02-10 09:11:34 +02:00
Topi Pohjolainen
3c432d48bf i965: Use constant pointer when checking for compression
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-02-10 09:10:45 +02:00
Brian Paul
85fab1f09a mesa: fix trivial comment typo in dlist.c 2016-02-09 20:09:30 -07:00
Kenneth Graunke
85f5c18fef i965/vec4: Drop support for ATTR as an instruction destination.
This is no longer necessary...and it doesn't make much sense to
have inputs as destinations.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2016-02-09 17:01:45 -08:00
Kenneth Graunke
67c5d00273 i965/vec4/gs: Stop munging the ATTR containing gl_PointSize.
gl_PointSize is delivered in the .w component of the VUE header, while
the language expects it to be a float (and thus in the .x component).

Previously, we emitted MOVs to copy it over to the .x component.
But this is silly - we can just use a .wwww swizzle and access it
without copying anything or clobbering the value stored at .x
(which admittedly is useless).

Removes the last use of ATTR destinations.

v2: Use BRW_SWIZZLE_WWWW, not SWIZZLE_WWWW (caught by GCC).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2016-02-09 17:01:45 -08:00
Kenneth Graunke
d56ae2d160 i965: Apply VS attribute workarounds in NIR.
This patch re-implements the pre-Haswell VS attribute workarounds.
Instead of emitting shader code in the vec4 backend, we now simply
call a NIR pass to emit the necessary code.

This simplifies the vec4 backend.  Beyond deleting code, it removes
the primary use of ATTR as a destination.  It also eliminates the
requirement that the vec4 VS backend express the ATTR file in terms
of VERT_ATTRIB_* locations, giving us a bit more flexibility.

This approach is a little different: rather than munging the attributes
at the top, we emit code to fix them up when they're accessed.  However,
we run the optimizer afterwards, so CSE should eliminate the redundant
math.  It may even be able to fuse it with other calculations based on
the input value.

shader-db does not handle non-default NOS settings, so I have no
statistics about this patch.

Note that the scalar backend does not implement VS attribute
workarounds, as they are unnecessary on hardware which allows SIMD8 VS.

v2: Do one multiply for FIXED rescaling and select components from
    either the original or scaled copy, rather than multiplying each
    component separately (suggested by Matt Turner).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2016-02-09 17:01:45 -08:00
Jason Ekstrand
09b3e30dc6 anv: Fix up spirv for new texture/sampler split stuff 2016-02-09 16:48:36 -08:00
Brian Paul
cac54d7987 st/mesa: clarify some texture target code in st_cb_drawpix.c
Use st->internal_target instead of PIPE_TEXTURE_2D when choosing the
texture format.  Probably no real difference, but let's be consistent.

Simplify a test when determining whether we need normalized texcoords.

Add a new assertion.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-09 17:48:26 -07:00
Brian Paul
5e4de781fa st/mesa: fix bitmap texture target code and simplify tex sampler state
Bitmaps may be drawn with a PIPE_TEXTURE_2D or PIPE_TEXTURE_RECT resource
as determined at context creation by checking if PIPE_CAP_NPOT_TEXTURES is
supported.  But many places in the bitmap code were hard-coded to use
PIPE_TEXTURE_2D.  Use st->internal_target instead.

I think an older NV chip is the only case where a gallium driver does not
support NPOT textures.  Bitmap drawing was probably broken for that GPU.

Also, we only need one sampler state with texcoord normalization set up
according to st->internal_target.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-09 17:48:25 -07:00
Brian Paul
9e2a9d5743 st/mesa: use MAX3() macro, as we do for sampler view code below
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-09 17:48:25 -07:00
Brian Paul
a5b8ede253 st/mesa: move some st_cb_drawpixels.c code, add comments 2016-02-09 17:47:42 -07:00
Jason Ekstrand
b14f4c1fd3 Merge remote-tracking branch 'mesa-public/master' into vulkan
This pulls in the separate texture/sampler stuff from upstream
2016-02-09 16:47:37 -08:00
Jason Ekstrand
e01dd59b73 vtn: Use const_index helpers 2016-02-09 16:32:38 -08:00
Jason Ekstrand
e15f7551d1 anv/apply_pipeline_layout: Use the new const_index helpers 2016-02-09 16:32:38 -08:00
Jason Ekstrand
768bd7f272 Merge commit '8b0fb1c152fe191768953aa8c77b89034a377f83' into vulkan
This pulls in Rob Clark's const_index changes for NIR
2016-02-09 15:30:39 -08:00
Nanley Chery
c624241ef4 mesa/readpix: Dedent former _mesa_readpixels() if block
Formatting patch split out for easy reviewing.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-09 15:13:07 -08:00
Nanley Chery
b89a8a15c2 mesa/readpix: Don't clip in _mesa_readpixels()
The clipping is performed higher up in the call-chain.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-09 15:13:07 -08:00
Nanley Chery
605832736a mesa/readpix: Clip ReadPixels() area to the ReadBuffer's
The fast path for Intel's ReadPixels() unintentionally omits clipping
the specified area to a valid one. Rather than clip in various
corner-cases, perform this operation in the API validation stage.

The bug in intel_readpixels_tiled_memcpy() showed itself when the winsys
ReadBuffer's height was smaller than the one specified by ReadPixels().
yoffset became negative, which was an invalid input for tiled_to_linear().

v2: Move clipping to validation stage (Jason)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92193
Reported-by: Marta Löfstedt <marta.lofstedt@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-09 15:13:07 -08:00
Nanley Chery
55d56d34e0 mesa/image: Make _mesa_clip_readpixels() work with renderbuffers
v2: Use gl_renderbuffer::{Width,Height} (Jason)

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-09 15:13:07 -08:00