Commit graph

82384 commits

Author SHA1 Message Date
Rob Clark
3e13572826 freedreno/ir3: deal with duplicate phi sources
Otherwise we end up with funny things like:

  mov.f32f32 r0.x, r1.y
  mov.f32f32 r0.x, r1.y

(It doesn't happen as much after fixing the problem w/ CP into phi src,
but it can still happen since we aren't too clever about generating phi
sources in the first place.)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
f8feb97ba5 freedreno/ir3: fix silly brain-fart in RA
We want to consider all the vars, not 1/32nd of them, when extending
live-ranges.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
8e451c2d06 freedreno/ir3: don't cp into phi's
The block defining a phi source might not have been executed.  If we
allow copy propagation, we could end up pointing to a src instruction in
the wrong block.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
383b6e87f9 freedreno/ir3: we can't store immediate values
Fixes some transform-feedback piglits, like:

bin/ext_transform_feedback-nonflat-integral

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
d47fb856af freedreno/ir3: add dumping for use/def/live-in/live-out
Turned out to be useful to debug an issue in RA.  Let's keep it.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
38ae05a340 freedreno/ir3: drop unused instr category arg
No longer used, so drop the extra arg to ir3_instr_create()

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
19739e4fb9 freedreno/ir3: remove ir3_instruction::category
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Rob Clark
70735643f4 freedreno/ir3: encode instruction category in opc_t
Been on my TODO list for a while.  If nothing else this will make gdb
properly grok the opc_t enum.

This first step preserves ir3_instruction::category (with an added
assert that category matches what is encoded in opc_t).  Next step is
to drop the category field (and arg to ir3_instr_create()), but that
is split into next commit for bisectability and so that we can run
piglit in the intermediate state to flush out any problems.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-04 20:18:18 -04:00
Jason Ekstrand
5ea3647f89 i965/fs: Move the code for load/store_shared to emit_cs_intrinsic
They are compute-shader only and that's where the code for doing atomics on
shared variables lives so it seemes to make sense.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-04-04 15:56:50 -07:00
Jason Ekstrand
80c72a8ea7 i965/nir: Provide a default LOD for buffer textures
Our hardware requires an LOD for all texelFetch commands even if they are
on buffer textures.  GLSL IR gives us an LOD of 0 in that case, but the LOD
is really rather meaningless.  This commit allows other NIR producers to be
more lazy and not provide one at all.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-04-04 15:56:39 -07:00
Jason Ekstrand
e5c833db5a i965/compiler: Remove a redundant declaration of brw_compiler_create 2016-04-04 14:51:35 -07:00
Kenneth Graunke
3babb7b0a4 nir: Use PRIi64 and PRIu64 instead of %ld and %lu.
%ld and %lu aren't the right format specifiers for int64_t and uint64_t
on 32-bit (x86) systems.  They're %zu on Linux and %Iu on Windows.

Use the standard C99 macros in hopes that they work everywhere.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2016-04-04 14:38:48 -07:00
Kenneth Graunke
da5d08707b i965: Fix invalid pointer read in dead_control_flow_eliminate().
There may not be a previous block.  In this case, there's no real work
to do, so just continue on to the next one.

v2: Update for bblock->prev() API change.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-04-04 14:34:40 -07:00
Kenneth Graunke
9486614938 i965: Make bblock_t::next and friends return NULL at sentinels.
The bblock_t::prev/prev_const/next/next_const API returns bblock_t
pointers, rather than exec_nodes.  So it's a bit surprising.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-04-04 14:34:16 -07:00
Kenneth Graunke
5509d43a11 glsl: Lower variable indexing of system value arrays unconditionally.
lower_variable_index_to_cond_assign() did not handle system values.
gl_SampleMaskIn[] is a system value, and also an array.  Accessing it
with a variable index would trigger an unreachable() assert.

Rather than adding a new EmitNoIndirectSystemValues flag, we simply
lower unconditionally.  There is exactly one case where this occurs,
and for all current drivers, lowering produces optimal code.  Even
for future drivers with 32x MSAA, it produces reasonable code.

Fixes Piglit's new samplemaskin-indirect test.  Also fixes many ES31-CTS
tests when OES_sample_variables is enabled.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-04-04 14:29:21 -07:00
Jason Ekstrand
db35a851ad i965/defines: Unconditionally define primitives 2016-04-04 14:25:36 -07:00
Jason Ekstrand
6a04968784 Merge remote-tracking branch 'public/master' into vulkan 2016-04-04 13:58:05 -07:00
Jason Ekstrand
88ef2476dc i965/peephole_ffma: Only match a mul+add if none of the ops are exact
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-04-04 13:48:10 -07:00
Jason Ekstrand
eb93d6dec8 nir/search: Don't match inexact expressions with exact subexpressions
In the first pass of implementing exact handling, I made a mistake with
search-and-replace.  In particular, we only reallly handled exact/inexact
on the root of the tree.  Instead, we need to check every node in the tree
for an exact/inexact match.  As an example of this, consider the following
GLSL code

precise float a = b + c;
if (a < 0) {
   do_stuff();
}

In that case, only the add will be declared "exact" and an expression that
looks for "b + c < 0" will still match and replace it with "b < -c" which
may yield different results.  The solution is to simply bail if any of the
values are exact when matching an inexact expression.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-04-04 13:48:10 -07:00
Jason Ekstrand
fe247bbe92 nir: Stop double-printing function arguments 2016-04-04 12:10:20 -07:00
Jason Ekstrand
cb317b8d07 glsl: Stop force-enabling compute shaders
This isn't needed since we no longer use the GLSL compiler in Vulkan.
2016-04-04 12:09:12 -07:00
Jason Ekstrand
4d040a4ad3 glsl/standalone: Get rid of the unneeded _mesa_error_no_memory stub
This hasn't been needed since we stopped using the GLSL compiler in the
Vulkan driver and it was tripping up scons.  Removing it fixes the scons
build.
2016-04-04 12:07:51 -07:00
Kenneth Graunke
65fbc43d54 i965: Add an INTEL_PRECISE_TRIG=1 option to fix SIN/COS output range.
The SIN and COS instructions on Intel hardware can produce values
slightly outside of the [-1.0, 1.0] range for a small set of values.
Obviously, this can break everyone's expectations about trig functions.

According to an internal presentation, the COS instruction can produce
a value up to 1.000027 for inputs in the range (0.08296, 0.09888).  One
suggested workaround is to multiply by 0.99997, scaling down the
amplitude slightly.  Apparently this also minimizes the error function,
reducing the maximum error from 0.00006 to about 0.00003.

When enabled, fixes 16 dEQP precision tests

   dEQP-GLES31.functional.shaders.builtin_functions.precision.
   {cos,sin}.{highp,mediump}_compute.{scalar,vec2,vec4,vec4}.

at the cost of making every sin and cos call more expensive (about
twice the number of cycles on recent hardware).  Enabling this
option has been shown to reduce GPUTest Volplosion performance by
about 10%.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-04-04 11:35:16 -07:00
Jason Ekstrand
8c8157bf6f Remove more spirv2nir remnants 2016-04-04 11:24:48 -07:00
Kenneth Graunke
3aa51e02d6 i965: Allow 8x MSAA on >= 64bpp formats on Gen8+.
See commit 3b0279a69 - this restriction is documented in the "Surface
Format" field of RENDER_SURFACE_STATE.

Looking at newer documentation, this restriction appears to exist on
Haswell, but no longer applies on Gen8+.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2016-04-04 10:41:29 -07:00
Brian Paul
1eeec7ec41 docs: remove stray 'TBD' in 11.2.0 relnotes file 2016-04-04 10:33:11 -06:00
Emil Velikov
35132c413c docs: add news item and link release notes for 11.2.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-04-04 12:57:56 +01:00
Emil Velikov
dc4923d41f docs: add sha256 checksums for 11.2.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e7fb889dcc)
2016-04-04 12:55:55 +01:00
Emil Velikov
7dc11ed0b2 docs: Update 11.2.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ff9ddb9eb1)
2016-04-04 12:55:54 +01:00
Dave Airlie
f9b8b48bed mesa/get: fix MAX_GEOMETRY_SHADER_STORAGE_BLOCKS
this was returning the fragment shader value.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-04-04 10:52:25 +01:00
Ilia Mirkin
4bc3b1ca48 nvc0: add hardware ETC2 and ASTC support on GK20A and GM107+
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-04-04 00:32:48 -04:00
Ilia Mirkin
dab40d8083 docs: add note about GL_EXT_base_instance, sort entries
Trivial.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-04-03 21:18:17 -04:00
Ilia Mirkin
d76e1cd2dd mesa: expose EXT_base_instance in ES3 contexts
This extension is identical to ARB_base_instance. Reuse the same
entrypoints.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 20:40:55 -04:00
Ilia Mirkin
807e2c27ac mesa: expose EXT_polygon_offset_clamp in ES contexts
The extension spec was extended to also support ES. This functionality
is provided all the way back to ES 1.0.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 20:40:55 -04:00
Kenneth Graunke
40628886ca glsl: Print "precise" on ir_variable nodes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2016-04-03 17:33:38 -07:00
Jose Fonseca
7ad49daca6 gallivm: Introduce lp_format_intrinsic.
For adding .v4f32 like suffixes to intrinsics, taking special care for
scalar case, which was being often neglected.

This fixes invalid IR when doing mipmap filtering on SSE2 (the only
case where we'd use intrinsics with scalars.)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-04 00:06:09 +01:00
Ilia Mirkin
7af12a8dc6 glsl: make *sampler2DMSArray available in ESSL 3.20
Also avoid double-adding the *sampler2DMS types when the array ext is
enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:06:52 -04:00
Ilia Mirkin
aebb0e0186 glsl: make ssbo predicate return true when in a GLSL 430 or ESSL 310 shader
I can't tell whether this actually matters, but we're creating function
signatures with this predicate, so it should probably match when SSBO's
are available.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:06:49 -04:00
Ilia Mirkin
87906cbc37 glsl: allow conservative depth qualifiers in GLSL 420
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:06:35 -04:00
Ilia Mirkin
d50ffb5e46 mesa: add always-false-for-now enables for GL 4.3, 4.4, 4.5.
As the relevant extensions get implemented, the lines should be
uncommented. I believe this is (almost) everything needed for those GL
versions though.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:01:15 -04:00
Ilia Mirkin
9abbc49712 glsl: add ARB_ES3_1_compatibility support
Oddly a bunch of the features it adds are actually from ESSL 3.20. But
the spec is quite clear, oh well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:01:15 -04:00
Ilia Mirkin
1708e24f65 mesa: add ES3_1_compatibility extension enable
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-03 18:01:15 -04:00
Jose Fonseca
a293f57e13 gallivm: Use llvm.fabs.
Exactly the same code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 22:09:09 +01:00
Jose Fonseca
e4f01da15d gallivm: Prefer backend agnostic intrinsic for rounding.
We could unconditionally use these instrinsics, but performance with SSE2
would suck, as LLVM falls back to calling libm.

lp_test_arit.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 22:09:07 +01:00
Jose Fonseca
324451e73f gallivm: Add debug option to force SSE2.
For simulating less capable machines.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 22:08:57 +01:00
Jose Fonseca
5fa31a4aba llvmpipe: Test abs.
Trivial.
2016-04-03 11:17:20 +01:00
Jose Fonseca
522ebe701d llvmpipe: Build lp_test_arit on MSVC too.
It builds fine now.  Probably due to C99 support.

Trivial.
2016-04-03 11:17:20 +01:00
Jose Fonseca
b284f1f7f9 gallivm: Fix performance regressions due to vector selects.
LLVM often can't determine the mask elements are all ones/zeros, and
there doesn't seem to be a good way to hint that.

Thanks to Roland Scheidegger for spotting and analyzing the issue.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 09:51:27 +01:00
Jose Fonseca
11c4e5b45c gallivm: Remove lp_build_load_volatile.
No longer needed.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 09:51:27 +01:00
Jose Fonseca
bcfb86b09d gallivm: Use standard LLVMSetAlignment from LLVM 3.4 onwards.
Only provide a fallback for LLVM 3.3.

One less dependency on LLVM C++ interface.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-03 09:51:27 +01:00