Commit graph

27608 commits

Author SHA1 Message Date
Brian Paul
71dcc067a5 llvmpipe: add a few const qualifiers
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-19 08:51:51 -07:00
Brian Paul
6d551f9ea3 trace: assorted whitespace and formatting fixes
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2016-02-19 08:49:51 -07:00
Brian Paul
e8689d9df3 trace: remove unneeded inline qualifiers
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2016-02-19 08:49:41 -07:00
Brian Paul
2f3d06d9f9 svga: allow non-contiguous VS input declarations
This fixes a glDrawPixels regression since b63fe0552b.  The new
quad-drawing utility code uses 3 vertex attributes (xyz, rgba, st).
For glDrawPixels path we don't use the rgba attribute so there's a
gap in the TGSI VS input declarations (INPUT[0] = pos, INPUT[2] =
texcoord).  The TGSI->VGPU10 translations code did not handle this
correctly.  I missed this because my VM was configured for HWv11
while testing.

Another way to fix this would be to change the tgsi_scan.c code so
that the tgsi_shader_info::num_inputs (and num_outputs) included
the unused inputs/outputs.  These counts would then actually be
"max input register index + 1" rather than "number of used inputs".
But that change could impact all drivers so put it off for now.

No regressions found with piglit or typical GL apps.

v2: also update alloc_system_value_index() to use info.file_max[]

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-02-18 15:46:17 -07:00
Oded Gabbay
a3e3c3e621 gallivm: Check whether to stop disassemble only for x86
Because the if statement that checks whether we have a return
statement is valid only on x86, surround it with X86 or X86-64
arch defines

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-19 00:18:11 +02:00
Oded Gabbay
b3d42934a1 gallivm: use sstream for dissasembling
Currently, disassemble() directly prints to stdout. This has broke the
profiling support for llvmpipe JIT code.

This patch redirects the output to an sstream object, which is then
either gets printed to stdout (for assembly debugging) or gets written
to a file in /tmp/ (for profiling support).

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-19 00:18:11 +02:00
Rob Clark
93c62fdee9 trace: fix new gcc6 warnings
src/gallium/drivers/trace/tr_context.c:1713:39: warning: ‘rbug_blocker_flags’ defined but not used [-Wunused-const-variable]
 static const struct debug_named_value rbug_blocker_flags[] = {
                                       ^~~~~~~~~~~~~~~~~~

Note that use of rbug_blocker_flags was removed in:

commit 5494332128
Author: Jakob Bornecrantz <jakob@vmware.com>
Date:   Wed May 12 19:26:19 2010 +0100

    trace: Remove rbug from trace

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-18 17:10:55 -05:00
Rob Clark
5051d85b03 gallium/auxiliary: fix new gcc6 warnings
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c: In function ‘mm_bufmgr_create_from_buffer’:
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:288:4:
warning: statement is indented as if it were guarded by... [-Wmisleading-indentation]
    if(mm->map)
    ^~
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:286:1: note:
...this ‘if’ clause, but it is not
 if(mm->heap)
 ^~

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-18 17:10:55 -05:00
Rob Clark
bba836ea6a gallium/hud: fix new gcc6 warnings
src/gallium/auxiliary/hud/font.c:234:22: warning: ‘Fixed8x13_Character_159’ defined but not used [-Wunused-const-variable]
 static const GLubyte Fixed8x13_Character_159[] = {  9,  0,  0,  0,  0, 0,  0,170,  0,  0,  0,130,  0,  0,  0,130,  0,  0,  0,130,  0,  0, 0,170,  0,  0,  0,  0,  0};
                      ^~~~~~~~~~~~~~~~~~~~~~~
.... many more..

These are simply unused, just #if 0 them out for now, in case someone
wants to use them in the future.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-18 17:10:55 -05:00
Samuel Pitoiset
dfc95ad6d1 gallium/cso: only enable compute shaders when TGSI is supported
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94186
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-18 20:41:25 +01:00
Roland Scheidegger
d335b6abc0 gallivm, tgsi: provide fake sample_i_ms implementations
Just like the rest of the msaa "implementation" it's just fake for now...

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-18 05:00:03 +01:00
Tom Stellard
dc7cf07af3 radeon/llvm: Add TargetLibraryInfo to the pass manager
This will prevent optimization passes from introducing unsupported
library calls.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Tom Stellard
4f351a6cb1 radeon/llvm: Set the target triple on the module
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Tom Stellard
77f4e1c7ff gallivm: Add helpers for creating and destroying TargetLibraryInfo
This functionality is not exposed via the LLVM C API.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Samuel Pitoiset
cfd1dd0500 nvc0: invalidate all buffers when switching pipe contexts
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-17 21:14:24 +01:00
Rob Clark
37d540ba70 freedreno: expose time-elapsed query
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
ba194630cc freedreno/a4xx: implement time-elapsed query
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
62fa868728 freedreno/a4xx: better occlusion/sample counting
This seems to give more reliable results.  More similar to what we do on
a3xx, although I think it breaks the a3xx theory that the four sets of
results map to each MRT (since we appear to still only have four sets on
a4xx).  The divide-by-two is a bit odd, but seems to be needed for some
reason.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
87eb406791 freedreno/query: fix refcnt'ing issue
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
0e91dccf9c freedreno/query: some queries don't have ->begin_query()
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
9d23d7b7cb freedreno/query: align counter snapshot locations
Some hw queries need their sample memory locations to have certain
alignment.  At the moment that isn't an issue, since the only hw query
is occlusion, so all samples have the same size.  But when others are
added with different sample sizes, this starts to be a problem.

All current and immediately upcoming hw queries simply need their
sample address aligned to their size, so let's use that for now.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
8529e210ec freedreno/query: add optional enable hook
Add enable hook for hw query providers.  Some will need to configure
perfctr selector registers, which we want to do at the start of the
submit.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
45ab5b1c34 freedreno: query max gpu freq
This will be needed to support converting from cycle counts to time for
performance related queries (initially time-elapsed, but there are some
additional performance counters that could be wired up).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
dcb69185a0 freedreno: update generated headers
Mostly to pull in perf ctrs.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-17 10:41:55 -05:00
Rob Clark
2a7ceb5957 freedreno/ir3: fix new gcc6 errors
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c: In function ‘emit_tex’:
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c:1368:26: warning: unused variable ‘const_off’ [-Wunused-variable]
  struct ir3_instruction *const_off[4];
                          ^~~~~~~~~
unused since:

commit 8750299a42
Author: Jason Ekstrand <jason.ekstrand@intel.com>
Date:   Tue Feb 9 14:51:28 2016 -0800

    nir: Remove the const_offset from nir_tex_instr

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-17 10:41:55 -05:00
Karol Herbst
edf774bb7e nv50/ir: we can't do the add to mad conversion when the mul saturates
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 18:20:10 -05:00
Karol Herbst
068e9848ba nv50/ir: optimize neg(and(set, 1)) to set
helps shaders in saints row IV, bioshock infinite and shadow warrior

total instructions in shared programs : 1914931 -> 1903900 (-0.58%)
total gprs used in shared programs    : 247920 -> 247785 (-0.05%)
total local used in shared programs   : 5673 -> 5673 (0.00%)
total bytes used in shared programs   : 17558272 -> 17457320 (-0.57%)

                local        gpr       inst      bytes
    helped           0         137         719         719
      hurt           0          12           0           0

v2: remove this opt for OP_SLCT and check against float for OP_SET
v3: simplified the code

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 18:20:10 -05:00
Ilia Mirkin
ca23c8081f nv50/ir: fix quadop emission in the presence of predication
When there's a predicate, it just goes onto the sources list. If the
quadop only has a single regular source, we will end up thinking that
the predicate is the second source. Check explicitly for the predSrc so
that we don't accidentally emit the wrong thing.

This fixes a bunch of dEQP-GLES3.functional.shaders.derivate.* tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-02-16 18:20:10 -05:00
Ilia Mirkin
1d1ddfe5f8 nv50,nvc0: enable/disable seamless cubemap texturing as requested
In a situation where the seamless setting isn't available on a
per-texture basis (G200+ Teslas, and all Fermis), assume that all
samplers will have it identically set, and enable accordingly.

This fixes arb_seamless_cubemap piglit test on Fermi and Tesla.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 18:20:10 -05:00
Samuel Pitoiset
3d5f61a262 nvc0: enable compute support on GK110:GM200 with an envvar
Without this NVF0_COMPUTE environment variable, compute support is
initialized by default and this is not what we want for now because
it might break 3D. It will be enabled by default once we are sure it
won't break anything.

Please note that compute support on GM200+ is not enabled yet because
it needs to be double-checked.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 21:39:00 +01:00
Samuel Pitoiset
6d74fa5756 nvc0: add compute support for GM107
Fortunately, compute support on GM107 is very close to GK110, except
the GK110_COMPUTE.UNK02C4 which is invalid and should not be used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 21:39:00 +01:00
Samuel Pitoiset
bc331dd838 nvc0: fix compute state initialization on GK110+
Because our firmware doesn't support the GK110_COMPUTE.FIRMWARE[0x6]
method the GPU hangs when it is used. Removing it fix the issue and
allow to launch compute shaders on GK110+.

Tested on GK208 and GM107.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 21:39:00 +01:00
Samuel Pitoiset
f638512890 gm107/ir: add ATOM CAS emission
This fixes the following dEQP test and the other compswap variants.

dEQP-GLES31.functional.ssbo.atomic.compswap.highp_int

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 20:53:39 +01:00
Brian Paul
1bf8fa8277 cso: add CSO_BITS_ALL_SHADERS
For saving/restoring all shader stages.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-16 10:22:32 -07:00
Brian Paul
ffa1a1dd21 cso: make most of the cso_save/restore_x() functions static
Users of the CSO save/restore facility all use the new
cso_save/restore_state() functions instead.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Brian Paul
223ffd8a08 postprocess: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Brian Paul
70e8a4f734 gallium/hud: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Brian Paul
66889d8f84 gallium/util: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Brian Paul
9403571755 cso: add new cso_save/restore_state() functions
cso_save_state() takes a bitmask of state items to save.  Calling
cso_restore_state() restores those states.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Brian Paul
017a003f1c cso: remove comment
There's a similar comment just a few lines before.
2016-02-16 10:22:32 -07:00
Brian Paul
f7af12ae85 cso: add new cso_set_viewport_dims() helper
To simplify some viewport setting code in the state tracker.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-16 10:22:32 -07:00
Matthew Dawson
0bba5ca468 Handle removal of LLVMAddTargetData in SVN revision 260919
LLVM removed LLVMAddTargetData for the 3.9 release in r260919.  For the two
places in mesa where this is called, only enable the lines when compiling
for less then 3.9.

For the radeon driver, I'm not sure how to check if any other LLVM calls need
to be adjusted.  I think since the target data used is extracted from the
LLVMModule, it isn't necessary to pass it back to LLVM again.

The code does compile, and at least for radeonsi does run OpenGL games.

[ Michel Dänzer: Move #if closer to LLVMAddTargetData in lp_bld_init.c,
  and add HAVE_LLVM < 0x0309 guards around now unused occurrences of TD
  and data_layout ]

Signed-off-by: Matthew Dawson <matthew@mjdsystems.ca>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-16 16:18:35 +09:00
Ben Skeggs
33ace5544e nvc0: initial support for GM20x GPUs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:16 +10:00
Ben Skeggs
97fc3fd559 nvc0: implement support for maxwell texture headers
Adds support for the new TIC layout that's present on Maxwell GPUs,
heavily based on the code for the existing layout.

This code is required for GM20x support.  While GM10x supports the older
layout still, this commit switches it to use the updated version instead.

Piglit testing shows zero regressions on GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:13 +10:00
Ben Skeggs
7333b0c20c nvc0: import maxwell texture header definitions from rnndb
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:10 +10:00
Ben Skeggs
733c8f8c73 nv50-: split tic format specification
We previously stored texture format information as it would appear in
the TIC.

We're about to support the new TIC layout that appeared with Maxwell,
so it makes more sense to store the data in a split-out format.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:07 +10:00
Ben Skeggs
a928cbc205 nv50-: remove nv50_texture.xml.h
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:05 +10:00
Ben Skeggs
ff1af29dd9 nvc0: switch nvc0_tex.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:03 +10:00
Ben Skeggs
c999736c18 nvc0: switch nvc0_surface.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:02 +10:00
Ben Skeggs
63880dca12 nv50: switch nv50_tex.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-16 15:57:00 +10:00