Commit graph

6600 commits

Author SHA1 Message Date
José Roberto de Souza
27074cb48b anv/allocator: Drop uncessary function
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:41 +00:00
José Roberto de Souza
4aee4f0975 anv/allocator: Move definition of ANV_FREE_LIST_EMPTY to anv_allocator
While at it also renaming EMPTY to ANV_FREE_LIST_EMPTY_VAL to be more explicit.
No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669>
2025-10-08 17:26:41 +00:00
Tapani Pälli
cb822a323f anv/blorp: add missing cs stall on compute pipe control
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Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715>
2025-10-08 04:49:27 +00:00
Tapani Pälli
c15b8329fd anv: add cs stall for any pipe control on compute
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715>
2025-10-08 04:49:27 +00:00
Iván Briano
a9ea7c542c anv: report maint5::earlyFragment*SampleCounting correctly
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The HW bug was fixed on Xe2, report so accordingly.

Can test behavior with dEQP-VK.fragment_operations.early_fragment.*_maintenance5

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37730>
2025-10-07 22:21:48 +00:00
Paulo Zanoni
6d6b22b734 intel/xe: unify behavior with i915.ko regarding ENOMEM on DRM_IOCTL_XE_EXEC
When the system is under memory pressure (which can happen, for
example, during CI runs), don't immediately give up the exec ioctl
(which, for Vulkan, will result in the device being declared lost).
Instead, retry a little bit just like we do for i915.ko.

This is a trade-off.

One of the reasons to *not* have unified behavior regarding ENOMEM
between i915.ko and xe.ko is the fact that xe.ko uses vm_bind, so if
the user tried to bind more memory than it is able to, we'll just keep
getting ENOMEM as long as we retry the ioctl. We now have a retry
limit, so we'll eventually return the error.

On the other hand, if the problem is other applications consuming all
the memory, having the retry loop may really help avoid unnecessarily
marking the device as lost, since one of our retries may eventually
succeed.

I believe the tradeoff of "we'll now eventually succeed in some cases
where it's possible to succeed, at the expense of retrying for a few
seconds until giving up in cases where we would never be able to
succeed" is an improvement.

If xe.ko ever gives us a way to differentiate between the two
different reasons for ENOMEM, we'll be able to make things much
better. We can also tune our timeouts if needed.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
d19a051714 intel/i915: add i915_gem_execbuf_ioctl()
Unify the common code for i915.ko execbuf submission between Iris and
Anv. I plan to add more code to this function in the next patches.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
0c638d08e5 anv: we never set I915_EXEC_FENCE_OUT
Don't check something that will never be there, just assert() it.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
5e67acbedc anv/xe: set the queue as lost instead of the device on execbuf failure
The i915.ko backend calls vk_queue_set_lost(), let's unify behavior.

v2: Adjust patch due to series reordering.

Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
0176c877d5 anv/i915: rework set_lost handling in anv_gem_execbuffer()
Move the handling to inside anv_gem_execbuffer(), and also rework
things in a way where we can tell from which caller the error is
coming from.

v2: properly return VkResult (José).

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
0932d0c7e0 anv/xe: rework set_lost handling in xe_exec_ioctl()
Move the handling to inside xe_exec_ioctl() and also rework things in
a way where we can tell from which caller the error is coming from.

v2:
 - properly return VkResult (José).
 - adjust the patch due to reordering the series.

Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
e694c7e84e anv/xe: extract xe_exec_ioctl()
For now, this just simplifies checking for devinfo->no_hw, but we're
planning to add more code that everybody calling the XE_EXEC ioctl
will run.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
bca75a8484 anv/i915: bring info->no_hw handling to anv_gem_execbuffer()
Every single caller does the same check.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Lionel Landwerlin
63d3c6379e anv: run image/intrinsic update pass
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773>
2025-10-07 08:54:26 +00:00
Nanley Chery
d41bff3836 anv: Query ISL for the aux-state of undefined layouts
For CCS_E on gfx12+, this will cause us to perform full resolves when
transitioning from undefined to a layout which does not support
compression. We don't currently perform such transitions because
compression is always enabled.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383>
2025-10-06 13:50:38 +00:00
Alyssa Rosenzweig
c2ae207e80 brw,anv: use XML-based stats
I didn't bother switching either iris or elk/hasvk but one could.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517>
2025-10-02 20:22:00 +00:00
Jordan Justen
be61c12f3e anv: Use image view base-layer in can_fast_clear_color_att()
We currently only support fast clearing the first layer of an image.
Attachments use VkImageView which can specify a base-layer of the view
for an image attachment.

Fixes: 44351d67f8 ("anv: Change params of anv_can_fast_clear_color_view")
Ref: https://projects.blender.org/blender/blender/issues/141181
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37562>
2025-09-26 19:15:22 +00:00
Hyunjun Ko
b7129a2085 anv/video: fix to set slice block size correctly for h265 decoding.
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Fixes dEQP-VK.video.encode.h265.resolution_change_dpb_layered_src_video_layout

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37412>
2025-09-26 12:27:59 +00:00
Simon McVittie
9d36bf891b vulkan: Compute path to write into JSON manifests once, use it everywhere
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This reduces duplication: we only need to distinguish between Windows
and Unix in one place.

The previous code was inconsistent about using either the `platforms`
option, or the `host_machine`. Following the logic described in
commit 94379377 "lavapipe: build "Windows" check should use the host machine, not the `platforms` option.",
I've assumed that checking the host machine is the more-correct version
and used that.

Signed-off-by: Simon McVittie <smcv@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37576>
2025-09-26 10:47:31 +00:00
Simon McVittie
be8cac52d3 vulkan: Consistently form driver library names as prefix + name + suffix
This consistently uses `NAME.dll` on Windows, `libNAME.dylib` on Darwin
derivatives such as macOS, and `libNAME.so` on Linux, *BSD and so on.
It's also consistent about using the local variable name `icd_file_name`
for this name in every Vulkan driver, which was already the case in many
but not all drivers.

Some of these drivers probably don't make sense (or don't work) on
Windows and/or macOS, but if this is kept consistent for all drivers,
it should avoid the need for driver-specific commits like
commit 611e9f29e "lavapipe: fix icd generation for windows",
commit 951f3287 "lavapipe: set empty dll prefix",
commit 13e7a39f "lavapipe: fixes for macOS support",
commit 7008e655 "radv: Update JSON generator if Windows" and so on,
each time a driver is found to be relevant on more platforms than
previously believed.

Signed-off-by: Simon McVittie <smcv@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37576>
2025-09-26 10:47:31 +00:00
Caio Oliveira
f00fca998e intel/mda: Add MDA_FILTER to select which archives to generate
Matches if names contains the filter value, multiple values separated by
commas.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29146>
2025-09-24 23:08:45 -07:00
Caio Oliveira
6c90a9c8e3 anv: Create archive file when using INTEL_DEBUG=mda
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29146>
2025-09-24 23:08:45 -07:00
Caio Oliveira
bce2cb1e24 anv: Refactor anv_shader_compile result handling
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29146>
2025-09-24 23:08:45 -07:00
Iván Briano
186cd59cf2 anv: use the color_map if present for calculating color_mask
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If the FS has writes to multiple color outputs, but there are not enough
color attachments for them all, we may optimize out the exceeding ones.
With VK_KHR_dynamic_rendering_local_read, we were not respecting the
mapping from output to attachment set by the application, and the wrong
writes were getting eliminated.

Fixes future CTS tests: dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.local_read.remap_single_attachment*

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37531>
2025-09-24 21:47:42 +00:00
Iván Briano
66fcae5b1b anv: fix FS output <-> attachment map building
The arrays is first memset to OUTPUT_DISABLED, but if we iterate over
MAX_RTS instead of the actual attachment count, we end up resetting any
values not set by the application to the, probably identity, that comes
from the state.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37531>
2025-09-24 21:47:42 +00:00
Dylan Baker
1c930a505e anv: don't attempt to memcpy if allocation fails
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Based on git history thhese appears to be a subset of
`anv_batch_emit_batch`, so I've structured the code similarly, if
`anv_batch_emit_dwords` returns `nullptr`, we just move on without
copying the memory.

CID: 1665339
CID: 1664814
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37534>
2025-09-24 15:29:48 +00:00
Lionel Landwerlin
66e9a2f61d anv: fix crash in ESO tests
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dEQP-VK.shader_object.misc.state.shaders.vert_geom_frag.geometry_streams.enabled
dEQP-VK.shader_object.misc.state.shaders.vert_tess_geom_frag.geometry_streams.enabled

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1d8847afcf ("anv: fix streamout config comparison")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37535>
2025-09-24 00:34:50 +03:00
Iván Briano
f97b51186f anv: intermediate RGB <-> RGBX copy for HIC
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For 3-component RGB images with OPTIMAL tiling, we need to create the
surface as RGBX or RGBA. When a host image copy to/from this image
happens, we calculate sizes and offsets based on the 4-component surface
and blow past the end of the 3-component API provided buffer.
Hilarity^WSegfault ensues.

Ideally we'd calculate the right sizes and have the tiled copy functions
handle the conversion, but they are format unaware and expect to just
copy bytes in blocks of equal sizes from both sides.

Handle this case by making an intermediate copy to/from linear RGB
from/to linear RGBX, and pass that intermediate slice to the tiled copy
functions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36453>
2025-09-23 18:06:14 +00:00
Iván Briano
5a18d8d867 anv: drop height_pitch parameter from anv_copy_image_memory
Calculate the start of the memory pointer in the caller instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36453>
2025-09-23 18:06:14 +00:00
Iván Briano
c02a27bce1 anv: handle multiple aspects in vkCopyImageToImage
Per VUID-VkCopyImageToImageInfo-srcImage-09069,
srcImage and dstImage must have been created with identical image
creation parameters, so we are not going to have copies from color <->
depth/stencil, but we can copy both D/S aspects of an image at the same
time.

Nothing says that we can't copy from one plane of a multiplanar image to
another, so handle that case too (though nothing is currently testing
it).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36453>
2025-09-23 18:06:14 +00:00
Iván Briano
68e4fd7de2 anv: drop EXT from host_image_copy stuff
It became core in 1.4

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36453>
2025-09-23 18:06:13 +00:00
Iván Briano
5c5d2b1e9f anv: pass only isl_format to helper functions
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36453>
2025-09-23 18:06:13 +00:00
Lionel Landwerlin
1d8847afcf anv: fix streamout config comparison
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e76ed91d3f ("anv: switch over to runtime pipelines")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37251>
2025-09-23 16:01:30 +00:00
Calder Young
a6b11b58d9 anv: Fix tiling for AV1 IntraBC surface on Gfx125+
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Fixes: 3c7a834e ("anv: Add support for AV1 video decoding on Gfx125 and Xe2")

Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37352>
2025-09-23 07:48:42 +00:00
Lionel Landwerlin
1110763d7b anv: avoid unnecessary 3DSTATE_PS_EXTRA emissions
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 44aaf88425 ("anv: rework gfx state emission (again)")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37472>
2025-09-23 06:52:38 +00:00
Lionel Landwerlin
ade4952d3c anv: fixup 3DSTATE_COARSE_PIXEL emission
We had 2 bits for 3DSTATE_CPS/3DSTATE_COARSE_PIXEL and during the
rework I merged them since we only need one (3DSTATE_CPS is pre-Xe3,
3DSTATE_COARSE_PIXEL Xe3+).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 44aaf88425 ("anv: rework gfx state emission (again)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13923
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37472>
2025-09-23 06:52:38 +00:00
Calder Young
c5acf58fba anv: Add support for AV1 film grain sythesis on Xe2+
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37351>
2025-09-22 14:41:48 +00:00
Calder Young
1e8b96c40c anv: Advertise only OUTPUT_COINCIDE_BIT for AV1 video decoding
Intel HW does not support separate destination and reference output pictures
when decoding AV1 video. The only exception is film grain, which the Vulkan
spec already includes a caveat for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37351>
2025-09-22 14:41:48 +00:00
Lucas Fryzek
6e29e13e78 anv: Update viewport/scissor state when count changes
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We need to ensure that HW viewport and scissor state is updated when
just the count is updated.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37487>
2025-09-22 13:28:25 +00:00
Alyssa Rosenzweig
58fd54b56e anv,hasvk: do not use unify_interfaces
it's GLSL cruft we want to get rid of.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:10 +00:00
Alyssa Rosenzweig
0d7083d5bc brw: drop indirection on compiler options
I see no point, we allocate for every shader stage anyway. This is a bit
simpler.

I'm not a fan of the brw_compiler singleton at all but torching that is not on
today's agenda. Flattening it a little bit very much is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:08 +00:00
Paulo Zanoni
e7fd99c205 intel: rework the way sparse forces CCS/MCS/HIZ to be disabled
We want to be a little more granular than just "aux surfaces are
completely incompatible with sparse!", so have each of
isl_surf_get_*_surf disable itself when sparse is used.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
2025-09-17 21:42:58 +00:00
Tapani Pälli
7f63279307 anv: remove assert, group can have 0 shaders in it
This seems to be equal assert with febe90e109 as we hit this when
launching Quake II RTX.

Fixes: 69b6b4cb28 ("anv: add shader instruction emission")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37429>
2025-09-17 08:54:00 +00:00
Konstantin Seurer
ea51a67996 vulkan/bvh: Enable glsl extensions in meson
Having a list of all enabled/used extensions in meson allows us to get
rid of a lot of boilerplate in every bvh build shader.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35326>
2025-09-16 20:18:01 +00:00
Zhou Qiankang
b0528bcab1 anv: Use os_get_page_size for mmap offset alignment to work with page size other than 4K
Instead of hardcoding 4096-byte page size in bo mapping/unmapping logic,
use os_get_page_size() to determine the correct alignment for munmap()
offset adjustments and address assertions.

Signed-off-by: Zhou Qiankang <wszqkzqk@qq.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37389>
2025-09-16 10:25:56 +00:00
Nanley Chery
7c8e38ac67 anv: Rework locking for sparse binding with TR-TT
When sparse binding functions submit batches, they may modify the
exec_obj_index field of anv_bo structs. This field is used to ensure a
unique list of buffers is sent to the kernel (i915). Add a lock in these
functions to prevent multiple threads from modifying this field during
the batch submission process. To avoid creating a deadlock, also rework
the locking done in anv_queue_submit().

When playing the Monster Hunter Wilds Benchmark on a mesa build which
enables slab allocation of batch buffers (6f7a32ec92), this avoids a
sporadic assert failure:

nsterHunterWilds.exe:
   ../../src/intel/vulkan/i915/anv_batch_chain.c:489:
      setup_execbuf_for_cmd_buffers:
         Assertion `execbuf->bos[idx] == first_batch_bo_real' failed.

This issue was seemingly first introduced in 04bfe828db
("anv/sparse: allow sparse resouces to use TR-TT as its backend")

Backport-to: 25.2
Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12582
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37307>
2025-09-15 17:45:15 +00:00
Nanley Chery
27167fdcb5 anv,hasvk: Take trace submission ID out of lock
The Vulkan spec requires that access to the queue parameter be
externally synchronized for vkQueueSubmit(). So, each submit call to a
specific queue will have a unique ID.

Backport-to: 25.2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37307>
2025-09-15 17:45:15 +00:00
Dylan Baker
7b337e214d anv: remove dead code
This code cannot be reached, since we already checked for
`!valid_samples` and returned `VK_ERROR_FEATURE_NOT_PRESET` in that case
above, and have not altered `valid_samples` since.

Fixes: d5da6980d3 ("anv/sparse: don't support depth/stencil with sparse")
CID: 1662063
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37341>
2025-09-12 23:20:35 +00:00
Sushma Venkatesh Reddy
fe1d84e083 intel/compiler: apply sqrt workaround for Horizon Forbidden West shader
Added a workaround for a known shader in Horizon Forbidden West that causes
visual corruption on Intel anv driver. The fix clamps fsqrt inputs using
fmax(x, 1e-12) to avoid invalid values. Integrated the workaround via
brw_nir_apply_sqrt_workarounds() and applied it conditionally in the Vulkan
pipeline based on the shader's BLAKE3 hash.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12555

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36990>
2025-09-12 22:32:46 +00:00
Georg Lehmann
79d02047b8 intel: switch to new subgroup size info
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37258>
2025-09-12 21:05:17 +00:00