Commit graph

198079 commits

Author SHA1 Message Date
Valentine Burley
1de30ef284 panfrost/ci: Fix GitLab rules after YAML split
Add the new file so panfrost CI jobs are properly triggered.

Fixes: c793f612fc ("ci/panfrost: Split inherit definitions into -inc")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
(cherry picked from commit 040a24785e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Connor Abbott
407e4978a7 tu: Fill render pass state when resuming
We forgot to call tu_fill_render_pass_state when resuming because it was
mixed in with emitting commands for the start of the subpass. Fix that
by pulling it out. This adds some duplication, but I think it's better
than mixing command emission and CPU-side state setup in the same
function.

Fixes: cb0f414b2a ("tu: Add support for suspending and resuming renderpasses")
(cherry picked from commit f734dff419)

Conflicts:
	src/freedreno/vulkan/tu_cmd_buffer.cc

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
77324494ce anv: fixup error path for shader allocation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
(cherry picked from commit 7cc9d8eec7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
98293eb81e anv: add missing device_memory_report for shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
(cherry picked from commit 567c1b3af4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
6686559724 anv: fix internal representations of shaders
The shader assembly was only available when not hitting the cache.

Additionally the serialized shader code was also the relocated variant
which meant that it could differ from one run to the next. Instead
serialize the unrelocated code produced by the compiler.

With this change we now decode the copy of the ISA we have on the
host.

NIR dumps are only available for shaders not loaded from the cache
(much like the other drivers).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8f4c2bd566 ("anv: add runtime shader statistic support")
Acked-by: Michael Cheng <michael.cheng@intel.com>
(cherry picked from commit 37789249a1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Nanley Chery
5a9c6de6d3 anv: Don't allow STORAGE + CCS for Y_TILED mod
This can happen as a result of us adding on CCS to modifiers which don't
support it on gfx9-11.

Fixes image corruption seen with the following test:

   $ mpv av://lavfi:testsrc --config=no --vo=gpu-next --scale=ewa_lanczossharp --fs

Fixes: 01c4ea771c ("anv: Enable storage accesses with modifiers on gfx12+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12910
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit fe372f3b1b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Dylan Baker
ac0750d90c anv/video: Cast intentional read past end of struct member to void*
Coverity notices that we read past the end of the array we're pointing
to, which is intentional, we want to copy additional members from the
source struct into the target pointer. As such, cast to a `void *`,
since this will make Coverity happy.

CID: 1649589
Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
(cherry picked from commit 938fb7703e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Georg Lehmann
e5bd122d7b nir/divergence_analysis: fix swizzle_amd without fetch inactive
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 5f28bb72a7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Georg Lehmann
5f2cb73ced nir/opt_uniform_subgroup: fix swizzle_amd without fetch_inactive
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 1fc38d8539)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Georg Lehmann
3349c578ed nir/opt_uniform_subgroup: don't try to optimize non trivial clustered reduce
Fixes: 535caaf3e0 ("nir: Optimize uniform iadd, fadd, and ixor reduction operations")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit e11d7f06d0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Dylan Baker
26d7753c99 anv/video: Read the right source for memcpy
I'm assuming this based off the `if` branch above, after reading the
code for bit that Coverity pointed out in that branch. It doesn't look
correct to start at the base pointer, which will be 0 initialized and
has 52 bits of zero padding, while the default values are 255.

Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
(cherry picked from commit 0735551b08)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Benjamin Cheng
5fcc06830d radv/video: Always end ref pic modification list
The app-provided arrays should always end with IDC_END, but when
overriding we need to end the list with IDC_END as well.

Fixes: 2e21eec921 ("radv/video: Fix num_ref_idx_l{0,1} related overrides")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14436
Reviewed-by: David Rosca <david.rosca@amd.com>
(cherry picked from commit 72b43c0595)

Conflicts:
	src/amd/vulkan/radv_video_enc.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Calder Young
7264f03e23 anv: Fix misplaced assertion in anv_scratch_pool_alloc
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Fixes: ee42a489 ("anv: Fix scratch pool buffer allocation sizes")
(cherry picked from commit 2fbc722dcf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Rob Clark
66d590cf24 freedreno/decode: Add extra indent levels
Now we start hitting an extra indent level.

Fixes: d7db333b0e ("freedreno/decode: Add gen8 support")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
(cherry picked from commit ccdd5eb49d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Connor Abbott
345811c1b3 tu: Fix FragCoord offset when HW viewport offset is enabled
FragCoord seems to have the offset applied to it, so we don't need to
subtract it out. Fixes upcoming test
dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.custom_resolve.monolithic.fdm_nonsubsampled_multiview_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
(cherry picked from commit cd1e784148)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Connor Abbott
d0aed5d4b8 tu: Fix GRAS_BIN_FOVEAT* programming with more than 1 layer
Similar to when patching load/store coordinates, we have to convert the
layer to the view, splatting view 0 to all layers when there is more
than 1 layer and FDM-per-layer is not enabled.

Fixes upcoming new test
dEQP-VK.renderpasses.*.custom_resolve.*.fdm_nonsubsampled_multilayer_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
(cherry picked from commit b2c685af42)

Conflicts:
	src/freedreno/vulkan/tu_cmd_buffer.cc

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Calder Young
34cda6974b anv: Fix scratch pool buffer allocation sizes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: mesa-stable
(cherry picked from commit ee42a48984)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Ashley Smith
3a0683435e panfrost,panvk: Enable shader_realtime_clock on panthor 1.6
shader_realtime_clock requires a newer kernel version in order to enable
GLB_COUNTER_EN this change adds a check on this kernel functionality.

Remove GL_EXT_shader_realtime_clock from extensions as this now depends
on kernel version.

Fixes: e9c2c324 ("panvk: enable VK_KHR_shader_clock")
Signed-off-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 5681fabdc2)

Conflicts:
	src/panfrost/ci/panfrost-g610-gles2-extensions.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Natalie Vock
e619c5fdc7 radv: Move VMID reservation to vkCreateDevice
DXVK's DXGI implementation can create extra instances used for
enumerating physical devices besides the games' instance. When reserving
VMIDs for SPM, the DXGI instances may snatch the VMID reservation early,
making VMID reservation for the instance that actually needs it fail.
This starts being a problem on kernels 6.18+ where only one user may
reserve a VMID at a time.

Move reserving VMIDs to SQTT initialization inside vkCreateDevice so
that only the instances that actually create logical devices try
reserving VMIDs.

Cc: mesa-stable
(cherry picked from commit a7a4abc8d8)

Conflicts:
	src/amd/vulkan/radv_physical_device.c
	src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-15 11:23:34 -08:00
Janne Grunau
cd707cc449 util/driconf/asahi: Override GL renderer for web browsers
Several web sites block clients with "Apple" in the WebGL renderer
string if the reported OS is not one of Apple's.
This check seems to implemented via a 3rd party product which is slowly
rolled out over more web sites. Instead of playing whack-a-mole with
web sites in multiple browsers override the OpenGL renderer in mesa for
known browsers.

Backport-to: 25.3
Signed-off-by: Janne Grunau <j@jannau.net>
(cherry picked from commit f912db3f8d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:38 -08:00
Patrick Lerda
43f7efc999 r600: improve cayman scissor 1x1 workaround
This change improves evergreen_apply_scissor_bug_workaround().
It provides a fully functional workaround for cayman.

Note: this was the last functionality which was working
properly on evergreen but not on cayman.

Here are the tests fixed:
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-atomic/glscissor: fail pass
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-query/glscissor: fail pass
deqp-gles31/functional/fbo/no_attachments/interaction/1x1ms0_default_2048x2048ms4: fail pass
deqp-gles31/functional/fbo/no_attachments/npot_size/1x1: fail pass

Fixes: 87a5b07f90 ("gallium/radeon: add R600/Evergreen/Cayman support to common viewport code")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit 6246b7be10)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:37 -08:00
Dave Airlie
b2e6480488 nak/cmat: free the type mapping hash table.
Just noticed this on review.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 96662cd459)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:37 -08:00
Faith Ekstrand
af123810f7 pan/bi: Handle small vectors in bi_src_index()
bit_size <= 32 does not actually guarantee a single component, which
nir_src_as_uint() requires.  We could just check num_components == 1 but
it's easy enough to support any vector that fits in 32 bits.

Cc: mesa-stable
Reviewed-by: Romaric Jodin <rjodin@google.com>
(cherry picked from commit d3a890a58e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:36 -08:00
Utku Iseri
f9b14ec2d1 panfrost: add earlyzs FPK condition for v6-
While v7+ checks this on HW, older architectures depend on SW to do it.

Fixes: c43882ad54 ("panfrost: Allow pixels using discard to be killed")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
(cherry picked from commit 5c63446b94)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:36 -08:00
Yiwei Zhang
d929c83df9 pan: fix pan_blend_reads_dest to consider special min/max funcs
The min/max funcs are designed to operate solely on the source and
destination colors directly, without any scaling or multiplication by a
factor.

Test: dEQP-GLES3.functional.fragment_ops.blend.* pass with enabled FPK

Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
(cherry picked from commit d5bf0b0df7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-08 09:25:35 -08:00
Eric R. Smith
a88c776da0 panfrost: do not allow skipping of fragment shader when alpha-to-coverage
When alpha to coverage is enabled we cannot allow the fragment shader to
be skipped, because the calculated alpha result is essentially a side
effect (it can cause some samples to be discarded).

This brings the OpenGL driver in line with panvk, which already has this
check in its version of fs_required().

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Cc: mesa-stable
(cherry picked from commit 3ce6bcb9e8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-05 08:11:47 -08:00
Aitor Camacho
dcd2327de2 wsi/metal: Fix blit_imate_to_image's pool selection for cmd buffer alloc
Fixes: 39a7d65113 ("wsi/metal: Backend addition for drivers built on top of Metal")

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
(cherry picked from commit 273f668520)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-05 08:11:47 -08:00
Aitor Camacho
419223b5fc wsi/metal: Fix command buffer release at destroy
Fixes: 39a7d65113 ("wsi/metal: Backend addition for drivers built on top of Metal")

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
(cherry picked from commit a547c6306a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-05 08:11:47 -08:00
Benjamin Cheng
6e32611260 radv/video: Fix force_integer_mv=1 on intra frame
According to AV1 spec, force_integer_mv=1 on intra frames. However, VCN
FW does not expect integer mv to be set unless screen content tools are
enabled. This also aligns the code to the radeonsi logic.

(cherry-picked from commit fa1fd2413f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 21:14:22 +00:00
Anna Maniscalco
f8714ad190 radv: recalculate legacy_gs_info on bind
Previously legacy_gs_info calculated based on
gs_info->legacy_gs_info.esgs_itemsize which is calculated based on gs
input varyings.

However, when using ESO vs/tes can have outputs not read by gs, which
leads to underestimating LDS usage.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 20:41:10 +00:00
Samuel Pitoiset
3e098dc352 radv: reduce maxTexelBufferElements to 1<<29
It's the number of elements. RADV exposes VK_FORMAT_R64_{UINT,SINT}
formats for texel buffers, so the maximum is 1<<29 to fit in the
32-bit bounds checking.

Fixes KHR-GL46.texture_buffer_size_clamping.* with Zink and new VKCTS
dEQP-VK.texture.misc.max_elements.*.

Cc: mesa-stable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 20:41:10 +00:00
Samuel Pitoiset
e4049a3a07 radv: add radv_hide_rebar_on_dgpu and enable for Red Dead Redemption 2
RDR2 VRAM memory management when resizable BAR is enabled seems
incorrect because it keeps allocating VRAM without freeing anything.

This introduces a drirc option to emulate a fake carveout of 256MiB to
workaround this game bug. This also adjust memory budgets by
distributing it between visible and invisible because AMDGPU reports
the same value for both when REBAR is enabled.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12091
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 20:41:10 +00:00
Faith Ekstrand
9ebced37e3 pan/bi: Fix LD_VAR_BUF indirect offset calculations
We multiply by 16 correctly but then drop that in the case where vbase
is non-zero.  We typically lower FS input indirects so we don't see this
often but there are a few cases where they still sneak through.

Fixes: 0fcddd4d2c ("pan/bi: Rework varying linking on Valhall")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
(cherry picked from commit 83f90b0760)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 09:17:04 -08:00
Karol Herbst
cda749bd89 nir: add ACCESS to shared_uniform_block_intel
intel_nir_blockify_uniform_loads simply overwrites the intrinsic for
load_shared, which leads to messed up indicies, e.g:
  "base=0, access=volatile, align_mul=4, align_offset=0
became:
  "base=0, align_mul=4, align_offset=4"

Fixes: 0dd09a292b ("nir: add ACCESS_ATOMIC")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit a255e2ca56)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 09:15:34 -08:00
Timothy Arceri
37ae6d445a util/driconf: add Cursemark workaround
Fixes gpu hang on radeonsi and corrupt rendering on iris.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14392
Cc: mesa-stable

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
(cherry picked from commit b75cd07265)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 09:15:33 -08:00
Gurchetan Singh
6507723c18 gfxstream: fix logspam in TLS helper function
Logspam has been reported in a gfxstream initialization
path.

Fixes: 4a30c6fd70 ("gfxstream: Use the Mesa common tss_* TLS helper functions")
Cc: mesa-stable

Reviewed-by: David Gilhooley <djgilhooley.gmail.com>
(cherry picked from commit 4f45e834ae)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39003>
2025-12-04 09:15:31 -08:00
Yiwei Zhang
68d31c28d4 venus: fix racy semaphore feedback counter update
Previously, we update the sfb dst slot upon vn_SignalSemaphore so that
vn_GetSemaphoreCounterValue can poll just the feedback slot itself.
However, that can race with pending sfb cmds that are going to update
the slot value, ending up with stuck sync progression.

This change fixes it by disallowing vn_SignalSemaphore to touch the sfb
dst slot. To ensure counter query being monotonic, vn_GetSemaphoreCounterValue
now takes the greater of signaled counter and the sfb counter read.

Test with dEQP-VK.synchronization* group:
- w/o this: stuck shows up within 2 min with 8 parallel deqp runs
- with this: no stuck for multiple full runs of the same

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14304
Fixes: 5c7e60362c ("venus: enable timeline semaphore feedback")
(cherry picked from commit 829bd406c0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 15:02:48 -08:00
Sushma Venkatesh Reddy
e6a8e1321b drirc: Add anv_assume_full_subgroups for Detroit: Become Human
Add workaround to assume full 32-thread subgroups. This fixes rendering
corruption when running the Detriot: Become Human game using anv driver.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14120

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 36d7cd0514)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 22:24:03 +00:00
Icenowy Zheng
0cfce3ffda pvr: enable samplerMirrorClampToEdge feature
This is forgotten when advertising the corresponding extension, which
leads to inconsistency, thus fail of
dEQP-VK.api.info.vulkan1p2.feature_extensions_consistency CTS testcase.

Enable the corresponding feature too. I ran all CTS tests with
"mirror_clamp_to_edge" in name, which are all skipped with NotSupported
before (because of the feature being not advertised), and gain
3695/11140 Pass with the remaining ones still NotSupported (no Fail).

This also makes the feature extension consistency CTS testcase Pass too.

Fixes: 4d34c07b7a ("pvr: advertise VK_KHR_sampler_mirror_clamp_to_edge")
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
(cherry picked from commit ab9e148bfb)

Conflicts:
	src/imagination/vulkan/pvr_physical_device.c
        (File has been renamed since branchpoint)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 11:23:49 -08:00
Lionel Landwerlin
de09b48697 anv: add 32-wide subgroup requirement heuristic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13052
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Cc: mesa-stable
(cherry picked from commit 296325b787)

Stable:
    - `nir_src_as_alu` is still alled `nir_src_as_alu_instr`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 11:17:49 -08:00
Gil Pedersen
a1afc1076f intel: Add PIPE_FORMAT_R10G10B10X2_UNORM support
This utilizes the RGBX format faking logic from e8cd7a30 to enable
PIPE_FORMAT_R10G10B10X2_UNORM renderer support using swizzling.

This format is needed for better HDR rendering support in the iris driver, to
support the Proton / Wine DXGI implementation, which requires an RGBA ordered
renderer for its Vulkan implementation. This in turn requires the Wayland
display to support both alpha and opaque formats. The check currently fails,
since only PIPE_FORMAT_R10G10B10A2_UNORM is exposed when Gallium (iris) is
the DRI Wayland renderer.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 858364be71)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 08:40:31 -08:00
Aitor Camacho
d110b38d32 vulkan/wsi: Fix double destroy of present_id_timeline at swapchain create
Fixes: c888da3d48 ("vulkan/wsi: Add mechanism to wait for WSI semaphore unsignal.")

Reviewed-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
(cherry picked from commit df19ec3020)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 08:40:30 -08:00
Ian Romanick
84caa703c9 lavapipe: fp16 flrp must also be lowered
Prevents failures with fp16 in lavapipe and Zink on lavapipe when
"nir/lower_flrp: Check and set shader_info::flrp_lowered" is
applied. Lowering with an incomplete mask on the first call to
nir_lower_flrp will prevent later calls (with the complete mask) from
doing anything.

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 341e2d3283)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-03 08:40:27 -08:00
Lionel Landwerlin
48d55072b1 anv: fix broken ray tracing dynamic descriptors
We completely missed that handling.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e76ed91d3f ("anv: switch over to runtime pipelines")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14284
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 0ca870c6f3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 11:01:45 -08:00
Lionel Landwerlin
9586b50990 vulkan/runtime: track dynamic descriptor offsets for RT pipelines
Dynamic descriptors are mapped an array of offsets provided through
vkCmdBindDescriptorSets*() commands.

When pipelines are compiled with independent sets layouts, the
implementation might have to do additional runtime calculation to
figure out what offset in the contiguous array maps to what dynamic
descriptor in the pipeline layout.

For graphics pipelines you can always compute that information when
binding the shaders. There is always a limited amount of shaders (5
max).

For ray tracing pipelines, there could be lots of shaders to process
at every pipeline binding call. Besides there is no interface from the
runtime to the driver to list all the shaders used at the moment.

So do that tracking in the runtime and pass the information down to
the driver through the cmd_set_rt_state() vfunc.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 69a04151db ("vulkan/runtime: add ray tracing pipeline support")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 5c53c6e693)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 11:01:45 -08:00
David Rosca
c24290a929 radv/video: Fix AV1 quantization map maxQIndexDelta value
Fixes: ae6ea69c85 ("radv: Implement VK_KHR_video_encode_quantization_map")
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 2b2914d81f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 11:00:27 -08:00
Tapani Pälli
1ee375555c anv: add vk_wsi_disable_unordered_submits and enable for GTK
See radv change 0d9d45db4e for further explanation.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14354
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit b2b5e83894)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 11:00:27 -08:00
Gurchetan Singh
27a88241ba util: fix arithmetic on a pointer to void warning
Otherwise, the following error is observed:

src/util/cache_ops_x86_clflushopt.c:40:22:
   error: arithmetic on a pointer to void is a GNU extension [-Werror,-Wgnu-pointer-arith]
   40 |    void *end = start + size;
      |                ~~~~~ ^
src/util/cache_ops_x86_clflushopt.c:44:9:
  error: arithmetic on a pointer to void is a GNU extension [-Werror,-Wgnu-pointer-arith]
   44 |       p += cpu_caps->cacheline;
      |       ~ ^

This works with GNU extension enabled, but does lead to warnings
with Clang.

v2: Add to trial_c + trial_cpp checks (Erik)
v3: use c_msvc_compat_args to avoid fixing other instances of this issue (Erik)

Fixes: 555881e574 ("util/cache_ops: Add some cache flush helpers")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
(cherry picked from commit 14cfe14626)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 11:00:27 -08:00
Aitor Camacho
3e8ecfedd4 vulkan/cmd_queue: Use vk_strdup and free allocated string memory
Fixes: 9082715ab0 ("vk/cmd_queue: generate copies for string struct members")

Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
(cherry picked from commit 16c98f4f18)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-02 10:12:06 -08:00
Qiang Yu
212f734e37 glsl: support barrier() for task and mesh shader
It was ignored when translating glsl to nir.

Fixes: d52452a486 ("glsl: allow barrier builtin functions for mesh shader")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 2f6a034528)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38803>
2025-12-01 09:16:56 -08:00