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nir/divergence_analysis: fix swizzle_amd without fetch inactive

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Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
This commit is contained in:
Georg Lehmann 2025-12-09 15:17:13 +01:00 • committed by Marge Bot
parent 1fc38d8539
commit 5f28bb72a7
1 changed files with 7 additions and 2 deletions
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9
src/compiler/nir/nir_divergence_analysis.c
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@ -679,6 +679,13 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
is_divergent = src_divergent(instr->src[0], state);
break;
case nir_intrinsic_quad_swizzle_amd:
case nir_intrinsic_masked_swizzle_amd:
/* Without fetch inactive, reads for inactive lanes have to return 0. */
is_divergent = !nir_intrinsic_fetch_inactive(instr) ||
src_divergent(instr->src[0], state);
break;
/* Intrinsics with divergence depending on sources */
case nir_intrinsic_convert_alu_types:
case nir_intrinsic_ddx:
@ -736,8 +743,6 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
case nir_intrinsic_load_converted_mem_pan:
case nir_intrinsic_atomic_counter_read:
case nir_intrinsic_atomic_counter_read_deref:
case nir_intrinsic_quad_swizzle_amd:
case nir_intrinsic_masked_swizzle_amd:
case nir_intrinsic_is_sparse_texels_resident:
case nir_intrinsic_is_sparse_resident_zink:
case nir_intrinsic_sparse_residency_code_and: