Commit graph

186208 commits

Author SHA1 Message Date
Lionel Landwerlin
db11165c07 intel/cl: switch to SPIRV as shader storage
Effectively making intel-clc not needed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
2025-01-25 03:28:07 +00:00
Lionel Landwerlin
bf8a1e1e71 brw/elk: move internal kernel parsing out of intel_clc
So it can be called internally.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
2025-01-25 03:28:07 +00:00
Lionel Landwerlin
857236a81d spirv: build vtn_bindgen for Anv/Iris
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
2025-01-25 03:28:07 +00:00
Lionel Landwerlin
b0a882b3dc libcl_vk: add some vulkan enums/structures for DGC
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
2025-01-25 03:28:07 +00:00
Lionel Landwerlin
d3d771607d libcl: add MIN2/MAX2 macros
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
2025-01-25 03:28:07 +00:00
José Roberto de Souza
73f3de12ef iris: Pick scanout PAT entry for scanout buffers
Scanout PAT was never being picked what could cause render cache to
not be flushed during page flips causing visual corruption on
displays.

Cc: stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33127>
2025-01-25 02:53:44 +00:00
José Roberto de Souza
572eacec9e iris: Make sure a uncached heap is choosen for scanout and shared buffers when LLC is not available
Platforms without LLC were in risky to get a heap that is cached
what could cause scanout glitches.

Cc: stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33127>
2025-01-25 02:53:44 +00:00
Samuel Pitoiset
f8e7c037e3 radv: add a new helper to set image BO metadata
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33193>
2025-01-25 02:10:03 +00:00
Samuel Pitoiset
ee4a1021d1 radv: add support for BO metadata on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33193>
2025-01-25 02:10:02 +00:00
Martin Roukala (né Peres)
8fd0eda0cf freedreno/ci: uprev the a750 kernel to msm-next
This kernel was built using b2c's linux builder without any additional
patches... aside from the usual ones I apply for b2c, so we are almost
to the point where we can run a stable kernel on it!

The next uprev should be made from gfx-ci/linux rather than being
hosted on my server, but I would like to use a released kernel for
that.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33162>
2025-01-24 23:36:56 +00:00
Saroj Kumar
433004dcff ac/surface: fix missing NULL check in gfx12_select_swizle_mode()
Add null check for surf pointer.
Fixes segfault issue during start of gdm on gfx12.

Signed-off-by: Saroj Kumar <saroj.kumar@amd.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33199>
2025-01-24 21:51:50 +00:00
Karmjit Mahil
1f9d96ec78 vulkan: Add inital vram-report-limit layer
This Vulkan layer allows reporting a limited VRAM size to the
application. This layer can be useful for testing applications and
games which query for the memory budget adjusting their behavior
accordingly.

They layer does not set a hard limit on the amount of VRAM thus
applications can still make allocations even though the reported
budget might indicate no memory is left, if the set limit is lower
than of actually available VRAM.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30095>
2025-01-24 19:56:43 +00:00
Karmjit Mahil
ad603d300d util/simple_mtx: Add ASSERTED to parameter used only in an assert
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30095>
2025-01-24 19:56:42 +00:00
Rhys Perry
5cc977bee4 radv: set has_image_bvh_intersect_ray for null winsys
This is needed for fossilize-replay.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 14e3231b56 ("radv: add a flag to indicate ray tracing support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33201>
2025-01-24 18:08:12 +00:00
David Rosca
6ebc25bc14 frontends/va: Stop using extra context for deinterlacing
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33126>
2025-01-24 13:40:28 +00:00
David Rosca
ea73d1b47c gallium/vl: Add compute shader deinterlace filter
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33126>
2025-01-24 13:40:27 +00:00
David Rosca
604fb68876 radeonsi: Report surface alignment for AV1 encode
This is also useful for AV1 to allow applications to use container crop.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33083>
2025-01-24 13:04:47 +00:00
David Rosca
ad0f197c6c radeonsi/vcn: Fix AV1 coded size for VCN 5.0
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33083>
2025-01-24 13:04:47 +00:00
Job Noorman
b4c95124ab freedreno: add missing entries to ForEachMacros
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
2025-01-24 12:15:31 +00:00
Job Noorman
bbd164e2e3 freedreno: remove unused entries from ForEachMacros
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
2025-01-24 12:15:31 +00:00
Job Noorman
bc6152c1c3 freedreno: move ForEachMacros into freedreno
This change moves freedreno specific ForEachMacros from the top level
.clang-format to the freedreno specific .clang-format.

This is done to avoid triggering CI for all drivers when making changes
to this list.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
2025-01-24 12:15:31 +00:00
Job Noorman
dd74ef36a5 ir3: account for inserted nops in delay calculation
Whenever we insert a (nopN) on the previous instruction to add nops, we
initially add them to the current cycle count. However, existing (nopN)
fields are not accounted for. This means the if a (nopN) gets inserted
and the block is processed again, the cycle count will be too low and we
might insert more nops than necessary.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33178>
2025-01-24 11:39:44 +00:00
Samuel Pitoiset
d41a3bb744 radv: program COMPUTE_DISPATCH_INTERLEAVE on GFX12
To the same value as GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33185>
2025-01-24 11:08:59 +00:00
Samuel Pitoiset
c039caeb53 ac/cmdbuf: program SPI_SHADER_GS_MESHLET_CTRL to 0 in the GFX12 preamble
Otherwise, it's derivative group quads by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33185>
2025-01-24 11:08:59 +00:00
Lionel Landwerlin
7ddb49653d anv/brw: rework primitive count writing
Instead the complicated logic we currently have, do this :

We start with this shader :

int main() {
   ...
   if (...) {
      SetMeshOutputsEXT(0, 0);
      return;
   } else {
      SetMeshOutputsEXT(...);
   }
   ...
}

We turn it into this :

int main() {
   uint __temp_prim_count = 0;
   ...
   if (...) {
      __temp_prim_count = 0;
      return;
   } else {
      __temp_prim_count = ...;
   }
   ...

   if (is_first_group_lane()) {
      SetMeshOutputsEXT(..., __temp_prim_count);
   }
}

This works because the SPIRV spec says this :

   "The arguments are taken from the first invocation in each
    workgroup. Any invocation must execute this instruction no more
    than once and under uniform control flow."

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12388
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
2025-01-24 10:19:28 +00:00
Lionel Landwerlin
4cc847cfd4 anv/Wa_18019110168: copy the primitive count writes
That way we don't have to lower the set_vertex_and_primitive_count
intrinsic before applying this WA.

Cc stable for the next patches that are fixing something.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
2025-01-24 10:19:28 +00:00
Lionel Landwerlin
1067d95987 compiler: add VARYING_BIT_PRIMITIVE_COUNT
Cc stable for the next patches that are fixing something.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
2025-01-24 10:19:28 +00:00
Timothy Arceri
09f73024a5 glsl: fix num_views linker error
The declaration must be the same across shaders but not all shaders
must make the declaration.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33149>
2025-01-24 01:47:55 +00:00
Timothy Arceri
914697c4ac glsl: fix num_views validation message
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33149>
2025-01-24 01:47:55 +00:00
Caio Oliveira
ee625f44d5 intel/elk: Fix wrong destination to memset
Conversion to use rzalloc_array missed these.

Fixes: c9e667b7ad ("intel/elk: Remove uses of VLAs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12513
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33192>
2025-01-24 01:09:26 +00:00
Valentine Burley
c670bbc093 freedreno/ci: Update expectations again
This started passing in the last 24 hours on a306.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33187>
2025-01-24 00:29:11 +00:00
Rhys Perry
0eb5f66660 nir/validate: validate ssa dominance by default
This no longer modifies dominance metadata, so enable it by default.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
b145045112 nir/validate: preserve dominance during SSA validation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
b1945fd21a nir/validate: validate metadata
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9572
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
2d94ca93b5 nir/liveness: stop requiring instr indices
nir_live_defs_impl() doesn't actually use them, and every
nir_metadata_require of nir_metadata_live_defs already requires them.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
bfc570ff98 nir/gcm: stop preserving nir_metadata_loop_analysis
This pass changes instr_cost if it makes progress.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
36840db6fe nir/loop_analyze: use a sparse array and stop indexing SSA defs
Indexing SSA defs is unexpected behaviour and interferes with using
nir_loop_analyze_impl for validation.

It probably also breaks nir_metadata_live_defs.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
77118fcf72 nir: rerun loop analysis if the parameters change
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
aae1aa4888 d3d12: store only once in d3d12_emit_points
d3d12_lower_point_sprite expects a single store for each output, each
dominating the emit_vertex.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
083a557856 d3d12: fix phi handling in d3d12_lower_primitive_id
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
9c159490c3 microsoft/compiler: repair SSA in dxil_nir_split_tess_ctrl
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
3850f8b167 microsoft/compiler: invalidate loop analysis in dxil_nir_lower_double_math
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:44 +00:00
Rhys Perry
30473fd1e7 v3dv: fix SSA dominance error
Offset should be increased regardless of whether a result is written or
not.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
2025-01-23 23:35:43 +00:00
Konstantin Seurer
eecaf80554 radv/rmv: Use radv_rmv_log_resource_destroy more
Gets rid of some duplicate code with the added benefit of removing a
memory leak warning when destroying the device because
radv_rmv_log_border_color_palette_destroy did not destroy the resource
ID.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33167>
2025-01-23 23:07:49 +00:00
Connor Abbott
6d406eeefa tu: Support VK_EXT_conservative_rasterization on a7xx
This supports everything the blob does.

The registers exist on later a6xx gens, but they would be way more
inconvenient to use since they're mixed up with binning/not-binning and
compression state, and I'm not sure if it works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33152>
2025-01-23 22:37:11 +00:00
Connor Abbott
2798521bda tu: Stop setting binning fields on a7xx
These fields don't actually enable binning, but rather disables the FS.
This seems to happen automatically on a7xx when binning, because the
blob doesn't set them specially during the binning pass.

Move them to rasterization, because RB_RENDER_CNTL will start depending
on rasterization state in the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33152>
2025-01-23 22:37:11 +00:00
Connor Abbott
ffe8220bbd tu, freedreno: Write PC_DGEN_SU_CONSERVATIVE_RAS_CNTL
Prevent other processes writing this from messing us up.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33152>
2025-01-23 22:37:11 +00:00
Konstantin Seurer
6701806cd1 llvmpipe: Avoid a crash when using 5 coords with AF
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32935>
2025-01-23 21:57:04 +00:00
Konstantin Seurer
3f7564d86b llvmpipe: Fix half-pixel sample offset with AF
Simply adding -0.5 will cause a noticeable offset for low sample counts.

Reviewed-by: Aleksi Sapon <aleksi.sapon@autodesk.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32935>
2025-01-23 21:57:03 +00:00
Mike Blumenkrantz
f3b8d7da46 egl: never select swrast for vmwgfx
ForceSoftware will be true in this case from the high-level fallback,
but this isn't really swrast

Fixes: 1de7c86bc1 ("dri: pass through a type enum for creating screen instead of driver_extensions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33123>
2025-01-23 21:14:21 +00:00