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radeonsi: Report surface alignment for AV1 encode
This is also useful for AV1 to allow applications to use container crop. Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33083>
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commit
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2 changed files with 19 additions and 16 deletions
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@ -80,12 +80,6 @@ enum radeon_micro_mode
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#define RADEON_SURF_PREFER_64K_ALIGNMENT (1ull << 37)
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#define RADEON_SURF_VIDEO_REFERENCE (1ull << 38)
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enum radeon_enc_hevc_surface_alignment
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{
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RADEON_ENC_HEVC_SURFACE_LOG2_WIDTH_ALIGNMENT = 6,
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RADEON_ENC_HEVC_SURFACE_LOG2_HEIGHT_ALIGNMENT = 4,
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};
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struct legacy_surf_level {
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uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */
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uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */
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@ -470,18 +470,27 @@ static int si_get_video_param(struct pipe_screen *screen, enum pipe_video_profil
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}
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else
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return 0;
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case PIPE_VIDEO_CAP_ENC_SURFACE_ALIGNMENT:
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if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN ||
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profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
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union pipe_enc_cap_surface_alignment attrib;
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attrib.value = 0;
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attrib.bits.log2_width_alignment = RADEON_ENC_HEVC_SURFACE_LOG2_WIDTH_ALIGNMENT;
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attrib.bits.log2_height_alignment = RADEON_ENC_HEVC_SURFACE_LOG2_HEIGHT_ALIGNMENT;
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return attrib.value;
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case PIPE_VIDEO_CAP_ENC_SURFACE_ALIGNMENT: {
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union pipe_enc_cap_surface_alignment attrib = {0};
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if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN ||
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profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
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/* 64 x 16 */
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attrib.bits.log2_width_alignment = 6;
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attrib.bits.log2_height_alignment = 4;
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} else if (profile == PIPE_VIDEO_PROFILE_AV1_MAIN) {
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if (sscreen->info.vcn_ip_version < VCN_5_0_0) {
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/* 64 x 16 */
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attrib.bits.log2_width_alignment = 6;
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attrib.bits.log2_height_alignment = 4;
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} else {
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/* 8 x 2 */
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attrib.bits.log2_width_alignment = 3;
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attrib.bits.log2_height_alignment = 1;
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}
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}
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else
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return 0;
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return attrib.value;
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}
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case PIPE_VIDEO_CAP_ENC_RATE_CONTROL_QVBR:
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if (sscreen->info.vcn_ip_version >= VCN_3_0_0 &&
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