Commit graph

218778 commits

Author SHA1 Message Date
Daniel Lang
1bb72f7c72 etanviv: hwdb: Import gc_feature_database from eYs3D
This commit imports the gc_feature_database.h from https://github.com/eYs3D/eCV5546_linux/blob/master/drivers/media/platform/eys3d/vip9000/v6.4.18.5/hal/kernel/inc/gc_feature_database.h

git commit: 016c73a49f98c35c509415d7feee59ef95364f6c

Signed-off-by: Daniel Lang <dalang@gmx.at>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39760>
2026-02-17 22:43:32 +00:00
Daniel Lang
8eccbc1e8b etnaviv: hwdb: Import gc_feature_database from D-Robotics
This commit imports the gc_feature_database.h from https://github.com/D-Robotics/x5-kernel/blob/main/drivers/misc/verisilicon/gc8000l/hal/kernel/inc/gc_feature_database.h

git commit: a9938390654c9815b4c9c66eb39e39454d8f3e99

Signed-off-by: Daniel Lang <dalang@gmx.at>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39760>
2026-02-17 22:43:32 +00:00
Daniel Lang
609bbcc195 etnaviv: hwdb: Import gc_feature_database from Amlogic
This commit imports the gc_feature_database.h from https://github.com/khadas/npu-nanoq/blob/yocto-kirkstone-202406-smarthome/hal/kernel/inc/gc_feature_database.h

git commit: cf5e22a676c580b4582b1f49d86fb91641e834ae

Signed-off-by: Daniel Lang <dalang@gmx.at>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39760>
2026-02-17 22:43:31 +00:00
Adam Jackson
527b642800 venus: advertise VK_KHR_shader_fma
v2: move feat and ext to KHR group instead of core group

v3: update docs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39945>
2026-02-17 21:11:18 +00:00
Yiwei Zhang
5d141e6e09 venus: sync latest protocol for VK_KHR_shader_fma
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39945>
2026-02-17 21:11:18 +00:00
Jianxun Zhang
df7d333656 anv: Limit modifier disabling workaround to specific GTK versions
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The issue caused us to put a switch to disable (Xe2) drm modifers
in 2418c91537 is fixed in GTK 4.20.3,
so we can enable the modifiers with this and newer GTK releases.

GTK https://gitlab.gnome.org/GNOME/gtk/-/merge_requests/9164:
b2a42d5a6e Revert "vulkan: Wait for device to be idle before
           create/recreating swapchain"
270735a151 vulkan: Rework swapchain present implementation

The hex values represent the GTK version range: [4.0.0, 4.20.2] for
VK_MAKE_VERSION(), refer to:
f493f5c88d

Cc: mesa-stable
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39223>
2026-02-17 20:13:09 +00:00
Danylo Piliaiev
656ca73b94 tu/a7xx: Fix D/S corruption when loading them via load_3d_blit
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With TU_DEBUG=gmem,3d_load seen at least in: "Industria" and "NieR Replicant"
TU_DEBUG=noconcurrentresolves also prevent the issue.

We have to wait until all CP_EVENT_WRITE::BLIT are completed,
otherwise writing to depth image as color confuses HW.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39236>
2026-02-17 19:50:24 +00:00
Daniel Stone
b8eb0f88d3 vulkan/wsi/wayland: Correctly map 24bpp format types
VK_FORMAT_{R8G8B8,B8G8R8}_{UNORM,SRGB} describe a 3-component, 8bpc,
24bpp, format. This is mapped to that type for Android, and implemented
as such by panvk. radv maps these to 4-component/32bpp formats, but only
support these formats for buffers rather than images. The outlier is
ANV, which relies on the 24->32bpp mapping to happen.

The Wayland WSI was mapping this to the 32bpp R8G8B8A8/B8G8R8A8 formats
instead. This would cause a failure to import the dmabuf into the
compositor on panvk, as it would send a buffer which was too small. (Or,
if it did import: garbage.)

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39552>
2026-02-17 19:25:19 +00:00
Wei Hao
ec6d077351 radeonsi: fix threaded shader compilation finishing after context is destroyed
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32538>
2026-02-17 18:55:17 +00:00
Zan Dobersek
9da2ebf09c freedreno/common: set up a830 properties
Adjust or fill out various properties for the a830 GPU, setting up a gen1
base. So far these mostly mirror the gen2 properties, except for gmem
config layouts, and they will probably further diverge down the line.

A new GPU ID for a830 is also added, Turnip there runs on top of KGSL.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39874>
2026-02-17 18:16:19 +00:00
Zan Dobersek
8151212293 freedreno/common: make a8xx magic regs common between all such devices
With a8xx a lot of chicken bit and other device-specific magic register
handling has moved into the kernel, which leaves a list of register writes
that could be more commonly shared between all a8xx devices.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39874>
2026-02-17 18:16:19 +00:00
Daniel Stone
860c54d0a0 ci/panvk: Skip DRM WSI tests for v10/ASan
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They're broken differently here to G52, and leak all over the place.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39943>
2026-02-17 17:52:08 +00:00
Alyssa Rosenzweig
fc3951cfde util/bitset: add an assert for big BITSET_EXTRACT
This just bit me. Add an assert to catch the next person who doesn't
read the function signature and tries to extract 64-bits out and wonders
why things are silently broken.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39892>
2026-02-17 16:17:59 +00:00
Alyssa Rosenzweig
f55e87db93 nir: add missing ssbo atomics to nir_get_io_index_src_number
Match other SSBO intrinsics and other atomics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39895>
2026-02-17 15:42:36 +00:00
David Headrick
29f5be58e9 dozen: Resolve Seg Fault in dzn_physical_device_create
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dzn_physical_device_create runs dzn_wsi_init which allocates and initilizes wsi_interfaces.
If the wsi initlizalization fails, the wsi_interfaces are cleaned up and freed (wsi_common.c:330-> wsi_device_finish).
Once the failure propogates up, dzn_physical_device_create runs dzn_physical_device_destroy.
Then, dzn_wsi_finish frees the wsi_interfaces again.

Above path led to a Segmentation Fault on my system when running:
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic

This change removes dzn_wsi_finish call if dzn_wsi_init fails, avoiding
a "double free"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39928>
2026-02-17 15:19:37 +00:00
Marek Olšák
9dd92aa5db radeonsi: replace null descriptors with memset
This code didn't do anything.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
2026-02-17 14:47:41 +00:00
Marek Olšák
4b3e5a69f3 radeonsi: remove the CP DMA workaround for sparse for GFX6-9
We always use a compute shader in this case.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
2026-02-17 14:47:41 +00:00
Marek Olšák
a2309edb6b ac/nir/meta: properly align sparse buffer clears with 12-byte clear values
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
2026-02-17 14:47:41 +00:00
Marek Olšák
62cce3abcd ac/nir/meta: use the clear/copy compute shader if CP DMA doesn't support sparse
ac_prepare_cs_clear_copy_buffer determines whether to use CP DMA, and
the driver obeys that.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
2026-02-17 14:47:41 +00:00
Marek Olšák
bbcfab9f4f ac/nir/meta: don't scalarize sparse loads if the address is aligned to load size
This should make copying sparse faster if we get aligned buffer bounds.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39841>
2026-02-17 14:47:41 +00:00
Marek Olšák
38829bc373 radeonsi: don't fail a CB_RESOLVE assertion on gfx11
CB_RESOLVE doesn't exist on gfx11.

Fixes: 1a105e1b1f - radeonsi: remove CB_RESOLVE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39921>
2026-02-17 13:54:13 +00:00
Daniel Schürmann
d66de1bb49 glsl_to_nir: emit loop continue construct
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39777>
2026-02-17 13:15:36 +00:00
Paulo Zanoni
143370f1a7 anv: extract anv_get_color_format_features()
This commit extracts the third and final variant of function
anv_get_image_format_features2(). It is still a 296-line function, but
that is already significantly smaller than the 444-line behemoth that
anv_get_image_format_features2() was at the start of this patch
series.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:47 +00:00
Paulo Zanoni
1e0f6feb40 anv: extract 2 subvariants of anv_get_image_format_features2()
Function anv_get_image_format_features2() has 3 clear subvariants that
take paths independent of each other: one for compressed_emulated
formats, another for depth/stencil formats, and a third one for color
formats. Extract the 2 first subvariatns to their own sub-functions.
We'll extract the color variant in the next commit in order to make
the diff easier to review.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:47 +00:00
Paulo Zanoni
3946bb6b84 anv: extract anv_color_format_supports_drm_modifier_tiling()
A 76-line chunk of code just to decide if the format is supported,
let's move it to its own function.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:47 +00:00
Paulo Zanoni
f160d8db91 anv: unify blit_cts_workaround handling
This makes the code easier to read.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:46 +00:00
Paulo Zanoni
5fbaef795a anv: don't pass vk_format to anv_get_image_format_features2()
It's redundant information, as it's already part of struct anv_format.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:46 +00:00
Paulo Zanoni
3f3e0a4774 anv: anv_get_image_format_features2() can be static
No callers outside anv_formats.c.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39840>
2026-02-17 11:49:45 +00:00
Samuel Pitoiset
95c4d8d726 radv/meta: rework get_image_stride_for_96bit() and make it non-static
Some checks are pending
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
c1a507bf42 radv/meta: rename r32g32b32 to 96bit
Tt's shorter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
29ce18cb6f radv/meta: rename some variables for btoi 96-bit shader
To match push constants.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
9c90622c94 radv: remove a redundant check in radv_image_is_renderable()
RADEON_SURF_NO_RENDER_TARGET is already sets for such an image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
61b20e726f radv/ci: mark more WSI tests as flakes on NAVI21
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Georg Lehmann
6a662a59b7 nir/opt_algebraic: optimize 1.0 - b2f(a) to b2f(inot(a))
Which can then be cleaned up further.

Foz-DB Navi48:
Totals from 4156 (3.62% of 114655) affected shaders:
MaxWaves: 102580 -> 102620 (+0.04%)
Instrs: 11696222 -> 11679986 (-0.14%); split: -0.16%, +0.02%
CodeSize: 64452544 -> 64379204 (-0.11%); split: -0.13%, +0.02%
VGPRs: 288256 -> 288172 (-0.03%)
SpillSGPRs: 7290 -> 7297 (+0.10%)
Latency: 160690992 -> 160643825 (-0.03%); split: -0.05%, +0.02%
InvThroughput: 26869332 -> 26849963 (-0.07%); split: -0.09%, +0.02%
VClause: 237078 -> 237003 (-0.03%); split: -0.04%, +0.01%
SClause: 270560 -> 270564 (+0.00%); split: -0.01%, +0.01%
Copies: 936165 -> 937970 (+0.19%); split: -0.07%, +0.26%
Branches: 302981 -> 302992 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 244967 -> 245303 (+0.14%)
PreVGPRs: 232930 -> 232886 (-0.02%); split: -0.02%, +0.00%
VALU: 6200283 -> 6187264 (-0.21%); split: -0.23%, +0.02%
SALU: 1759176 -> 1760275 (+0.06%); split: -0.10%, +0.16%
VOPD: 447502 -> 446194 (-0.29%); split: +0.14%, -0.43%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39917>
2026-02-17 10:01:21 +00:00
Eric Engestrom
bbb2f884ad ci: drop redundant MESA_IMAGE
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It's already set by the extended `.set-image` 8 lines further up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39923>
2026-02-17 08:54:45 +00:00
Krzysztof Sobiecki
615e2d15d1 os: Add support for GNU/HURD compilation and use of dri swrast/llvmpipe.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39277>
2026-02-17 08:24:02 +00:00
Krzysztof Sobiecki
0662febcaf os: Don't use PATH_MAX as it's not portable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39277>
2026-02-17 08:24:02 +00:00
Krzysztof Sobiecki
400bec37ed gallium/dril: Don't use gbm if there is no gbm configured
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39277>
2026-02-17 08:24:02 +00:00
Pavel Ondračka
ee80f909e4 i915/ci: update expectation missed in piglit uprev
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39930>
2026-02-17 07:31:16 +00:00
Samuel Pitoiset
7fceeff970 radv/ci: mark more WSI flakes for NAVI21
Fixes: c332ee5dd6 ("ci/radv: Add some flakes I hit while testing WSI.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39929>
2026-02-17 08:04:03 +01:00
Timothy Arceri
b59c3ac82a mesa/st: use same path for setting state ref locations
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After the fix in a6fcc2835e we can now take the same path whether
allow_st_finalize_nir_twice is set or not.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39910>
2026-02-16 23:49:41 +00:00
Kenneth Graunke
add69407c7 brw: Use memset for initializing varying/slot maps
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:38 -08:00
Kenneth Graunke
19d9e10f4d brw: Drop VUE header values and position from wm_prog_data->inputs
The FS doesn't read these from the VUE so we don't care about them.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:36 -08:00
Kenneth Graunke
5e48094d72 brw: Drop BRW_VARYING_SLOT_PAD and brw_varying_slot enum
In elk, we tried to store our own "driver" enum values after Mesa's
VARYING_SLOT_MAX.  In brw, we eliminated all of these except for an
unnecessary "BRW_VARYING_SLOT_PAD" value.  This was used for empty
slots, so vue_map::slot_to_varying[] could store something.  This
patch replaces BRW_VARYING_SLOT_PAD with -1.

Our "driver" enum values overlapped with VARYING_SLOT_PATCH0, leading
to unnecessary headaches.  Now gl_varying_slot_name_for_stage will do
the right thing for both regular and patch varyings.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:35 -08:00
Kenneth Graunke
16ab31f358 brw: Use NUM_TOTAL_VARYING_SLOTS instead of VARYING_SLOT_TESS_MAX
This is a bit larger, but also clearer.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:34 -08:00
Kenneth Graunke
3dbeaf18c8 iris: Defeature native two-sided color support
This drops native support for legacy GL's two-sided color feature
in favor of lowering it via nir_lower_two_sided_color().  Instead
of having a whole bunch of state management hassle to set up the
SBE unit to swizzle between the COL and BFC VUE slots, and have it
transparently deliver one or the other to the fragment shader, we
simply deliver both and insert a conditional select there:

   (is-front-facing ? front color : back color)

This also works even for > 16 varyings, where swizzling via the SBE
unit isn't viable.

zink, asahi, freedreno, lima, panfrost, r600, v3d, and vc4 all use
this lowering rather than having native support.  Only four games in
our shader-db even use this feature.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:33 -08:00
Kenneth Graunke
613fe1600e iris: Drop use of BFC(n) when it exists but COL(n) is unwritten
Writing a back-face color but not a front-face color is undefined
behavior.  We were trying to politely work around potential application
bugs, but this is not required to work, and other drivers don't do it.

Drop the extra complexity.

If we do find a broken application that needs this hack, then a better
way to handle it is to have brw_compute_vue_map set the slot for
VARYING_SLOT_BFC(n) to the slot for VARYING_SLOT_COL(n) when COL(n) is
unwritten.  That way, this override is handled at shader compilation
time, and the run-time code can remain simple.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:31 -08:00
Kenneth Graunke
b17df36529 iris: Drop sprite coord checks from SBE_SWIZ setup
The "override with a constant" handling appears to take precedence over
the "override with point sprite coordinates" handling.  Because we were
overriding undefined inputs to <0, 0, 0, 1>, we needed to avoid this for
sprite coordinates, as they aren't written by a previous stage, but
shouldn't be overridden to zero.

Now that we've dropped that in the previous patch, there's no need to
special case sprite coordinates any longer.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:30 -08:00
Kenneth Graunke
4aaa19c3e7 iris: Use the first FS input's value for all undefined FS inputs
iris (and i965 before it) tried to to politely return <0, 0, 0, 1.0>
as the value of undefined FS inputs.  anv, however, just returns the
value of the first FS input attribute.  This makes iris match anv's
behavior, eliminating some overrides and simplifying the code.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:29 -08:00
Kenneth Graunke
b5c23b4785 iris: Drop SBE component overrides for layer/viewport varyings
We no longer read the VUE header values in the fragment shader, instead
relying on the payload fields.  So there's no need to do anything with
them here.  (Note that OpenGL's rules for preserving exact values of
layer/viewport built-ins were relaxed a while back, allowing us to use
the payload fields directly.  So this code might've been necessary in
the past, but it isn't now.)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38121>
2026-02-16 15:15:24 -08:00