6199 commits

Author	SHA1	Message	Date
Michael Cheng	169e7acee1	vulkan: add leaves and ir_leaves sizes to encode for utrace. ... Expose number of leaves and ir_leaves to the debug marker for encode. Signed-off-by: Michael Cheng <michael.cheng@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34200>	2025-03-28 18:25:40 +00:00
Rohan Garg	c6757cb8f0	isl: enable CPB compression ... Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10760 Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>	2025-03-28 04:38:09 +00:00
Rohan Garg	5d2a6b23de	anv: separate fast clear handling for compressed CPS ... CPS surfaces are marked as stencil compressed internally and should use the fast clear depth stencil path for clearing when possible Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>	2025-03-28 04:38:09 +00:00
Rohan Garg	dadd84f5a8	anv: no need to handle transitions for CPB surfaces ... Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>	2025-03-28 04:38:09 +00:00
Rohan Garg	80f9b61f02	anv: CPB surfaces that are used as color attachments or for stores cannot be compressed ... This particular scenario indicates that the CPB will be written to using a fragment shader, disable compression to ensure the correct data is read back from the surface later. Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>	2025-03-28 04:38:09 +00:00
Rohan Garg	6f4c23100a	anv: refactor add_aux_surface_if_supported to use a common variable ... Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>	2025-03-28 04:38:09 +00:00
Lionel Landwerlin	a88c9ea192	anv: limit implict write with drirc ... 9f32e1a489 meant to amend 1e80a426c2. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 9f32e1a489 ("anv/drirc: Add option to control implicit sync on external BOs") Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12629 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33587>	2025-03-27 08:28:20 +00:00
Tapani Pälli	694f2bbeeb	isl/iris/anv: setup L1CacheControl based on surface and buffer usage ... Patch chooses write through mode with storage surfaces when cache policy is set via ISL_SURF_USAGE_CACHE_POLICY_WT. This fixes rendering artifacts seen in: Space Engineers 2 Hogwarts Legacy Plague Tale: Requiem This was tested with some workloads on MTL and all on LNL/BMG. It fixes Space Engineers 2 rendering artifacts but not the crash which is a separate issue. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12714 Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12750 Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34044>	2025-03-26 20:19:07 +00:00
Tapani Pälli	84510aea8f	anv: pass down buffer usage for isl_buffer_fill_state ... Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34044>	2025-03-26 20:19:07 +00:00
Caleb Callaway	c37ece75ea	anv: add INTEL_DEBUG=rt_notrace ... Reviewed-by: Kevin Chuang <kaiwenjon23@gmail.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34169>	2025-03-26 00:52:53 +00:00
Hyunjun Ko	4236ef31ab	anv: Add stdSyntaxFlag values for h264/5 encoders ... Closes: mesa/mesa#12834 Signed-off-by: Hyunjun Ko <zzoon@igalia.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34094>	2025-03-25 23:54:32 +00:00
Lionel Landwerlin	25a695552a	anv: disable replication when we don't have both VS/FS stages ... Enabling this with shaders compiled separately through pipeline libraries fails because we currently only enable it for VS and the associated FS stage ends up with a non compatible VUE map. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34173>	2025-03-25 11:23:45 +00:00
Lionel Landwerlin	6b6a4cb1e2	anv: fix end of pipe timestamp query writes ... Currently trying to use PIPE_CONTROL on blitter/video engines. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12833 Acked-by: Hyunjun Ko <zzoon@igalia.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34095>	2025-03-25 10:35:19 +00:00
Lionel Landwerlin	32d25075ae	anv: relax depth/stencil<->color copy restrictions ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Ivan Briano <ivan.briano@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31983>	2025-03-25 08:01:15 +00:00
Lionel Landwerlin	4226c50b3f	anv: avoid early lower of the fp64 code ... Otherwise this will lead to scratch intrinsics for calls/returns. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Nanley Chery <nanley.g.chery@intel.com> Acked-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31983>	2025-03-25 08:01:14 +00:00
Matt Turner	a6c717d006	anv: Remove ignored qualifier ... Reported by clang's `-Wignored-qualifiers`. Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34014>	2025-03-13 20:11:10 +00:00
Matt Turner	d4a2ed8970	anv: Use unreachable instead of assert(!"...") ... Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34014>	2025-03-13 20:11:10 +00:00
Lionel Landwerlin	602843a881	vulkan/runtime: rely on vk_buffer::device_address ... With all the RT-enabled driver setting this field, we can now have the runtime use it instead of calling into the driver's vfunc. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34026>	2025-03-13 14:44:06 +00:00
Lionel Landwerlin	de2a65ade6	anv: fix non page aligned descriptor bindings on <Gfx12.0 ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: ab7641b8dc ("anv: implement descriptor buffer binding") Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33911>	2025-03-12 12:23:24 +00:00
Lionel Landwerlin	29865b41fb	anv: simplify internal blorp helper ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	900483f13f	anv: use addresses for buffer<->image copies ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	02bbe2f9c5	anv: track protection on anv_address ... This simplifies the propagation of the protection value, we just set it on buffer->address at creation time and forget about it. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	648d843813	anv: move xfb buffer storage to 64bit address + mocs ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	3c0dcfeb0f	anv: move vertex buffer storage to 64bit address + mocs ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	d254dc4eaf	anv: move index buffer entry point out of genX code ... Take the opportunity to move to 64bit address + mocs. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33909>	2025-03-12 09:37:50 +00:00
Lionel Landwerlin	4082e22676	anv: fill runtime buffer device_address field ... Might be useful if the runtime starts using that field. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33917>	2025-03-12 06:39:10 +00:00
Sviatoslav Peleshko	369aec5704	anv: Add full subgroups workaround for the shaders that use shared memory ... This workaround is similar to anv_assume_full_subgroups, but it applies to the shaders that use shared memory. If they rely on the implicit synchronization, and we choose a smaller group size than the (broken) shader expects, it will produce incorrect results. Cc: mesa-stable Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23408>	2025-03-11 22:06:25 +00:00
José Roberto de Souza	e146e573f7	anv: Add support to create protected bo and protected exec_queue in Xe KMD ... Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>	2025-03-06 16:25:03 +00:00
José Roberto de Souza	a99d90d015	anv: Move code adding protected memory type to common code ... Xe KMD now has support for protected memory, so lets move it to common code. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>	2025-03-06 16:25:03 +00:00
José Roberto de Souza	4860532f49	anv: Remove protected memory support from compute queue ... CCS don't support MI_SET_APPID instruction, that might be the reason some tests protected memory tests fail on CCS. Re-enable it if a workaround/solution is found. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>	2025-03-06 16:25:03 +00:00
Lionel Landwerlin	199a052481	anv: fixup indentation around Wa_16014912113 ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>	2025-03-05 17:20:12 +00:00
Lionel Landwerlin	888b2ec7b0	anv: break down Wa_16014912113 in need/apply parts ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>	2025-03-05 17:20:12 +00:00
Lionel Landwerlin	93a327c4e6	anv/brw: move INTEL_MSAA_* flag computation to the compiler ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>	2025-03-05 17:20:12 +00:00
Lionel Landwerlin	17ba9a19d1	anv/apply_layout: split binding table building into its own function ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33751>	2025-03-05 17:20:11 +00:00
Michael Cheng	014f376755	anv: Change as_build to show num tlas/blas ... As_build now shows the number of tlas/blas that was built. Signed-off-by: Michael Cheng <michael.cheng@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33720>	2025-03-05 14:19:56 +00:00
Tapani Pälli	1674cb3665	anv: restrict TessellationDistributionLevel for Wa_16025857284 ... Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33864>	2025-03-05 09:55:05 +00:00
Lucas Fryzek	b37bcd01ed	anv: Expose VK_EXT_device_memory_report ... Also mark VK_EXT_device_memory_report as supported by anv in docs/features.txt Co-authored-by: shenghualin <shenghua.lin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33767>	2025-03-04 15:24:39 +00:00
Lucas Fryzek	f01ad7c34c	anv: Implement VK_EXT_device_memory_report ... Report device memory events for: - command buffers - pipelines - descriptor sets and descriptor pools - device memory Co-authored-by: shenghualin <shenghua.lin@intel.com> Co-authored-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33767>	2025-03-04 15:24:39 +00:00
Lucas Fryzek	08483e9bfa	anv: Release correct bo for RT scratch ... Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33850>	2025-03-03 20:13:38 +00:00
Hyunjun Ko	f7ff9b240d	anv: Do not support the tiling of DRM modifier if DECODE_DST ... Fixes: 04709e4f ("anv: fix video profile lists"); Signed-off-by: Hyunjun Ko <zzoon@igalia.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33784>	2025-03-03 04:36:21 +00:00
Alyssa Rosenzweig	0b4ccac83e	anv,hasvk: switch to common VK_COPY/PRINT_STR ... Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33826>	2025-03-01 20:27:26 +00:00
Mike Blumenkrantz	6a29d2ed66	anv: support all dimensions of image for LINEAR dmabufs ... > Allowing 1D and 3D images, and array images too, with DRM_FORMAT_MOD_LINEAR, is ok > because VkImageDrmFormatModifierExplicitCreateInfoEXT::pPlaneLayouts is able to fully > describe the image layout. IF miplevels == 1, which this patch continues to enforce. Reviewed-by: Lina Versace <lina@kiwitree.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33668>	2025-02-28 19:04:33 +00:00
Lionel Landwerlin	02341733df	anv/iris: add drirc keys to disable VF/TE distribution ... This is a request from debug engineers to be able to trace the HW better when analyzing hangs. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33795>	2025-02-27 21:10:59 +00:00
Lionel Landwerlin	bbade676f4	anv/iris: centralize TBIMR drirc ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33795>	2025-02-27 21:10:59 +00:00
Kevin Chuang	87ff7b061f	anv/bvh: Fix copy shader handling sparse buffer ... Fixes: 692b5fa9f2 ("anv: Add shader to copy acceleration structures") This commit fixes the future test "sparse_binding_structures" for "header_bottom_address" for ray tracing pipeline. Even on 48-bit ray tracing (Xe1/2), the software-defined part instance_leaf_part1.bvh_ptr has to be in canonical form for copy.comp to deference a bvh, which means we have to preserve the upper 16bits. This is especially relevant in cases where the acceleration structure buffer is located high, such as sparse buffer. Signed-off-by: Kevin Chuang <kaiwenjon23@gmail.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33745>	2025-02-27 20:10:10 +00:00
Kevin Chuang	b9a980ea73	anv/bvh: Fix encoder handling sparse buffer ... Fixes: 2fe57947e3 ("anv: Implement encode shader to fit in ANV BVH") This commit resolves the failures in the future tests "sparse_binding_structures" for rayquery. Sparse buffers' heaps are located high, and since it's in canonical form, the higher 16bits are all set to 1. However, the existing encoder did not expect any non-zero values at the higher 16bits. As a result, the instance flags got corrupted, causing most triangle tests to fail. Thanks for Paulo providing insights about sparse buffer properties. Co-developed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Kevin Chuang <kaiwenjon23@gmail.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33745>	2025-02-27 20:10:10 +00:00
Sagar Ghuge	2c8148a76e	anv: CPS LOD Compensation Enable is deprecated on Xe2+ ... On Xe2+, Hardware will always have scale.x and scale.y as 1.0. This is not fixing any issues. Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33726>	2025-02-27 19:49:02 +00:00
Alyssa Rosenzweig	9a58a8257e	treewide: Switch to nir_progress ... Via the Coccinelle patch at the end of the commit message, followed by sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog') ninja -C ~/mesa/build clang-format cd ~/mesa/src/compiler/nir && clang-format -i *.c agxfmt @@ identifier prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} -return prog; +return nir_progress(prog, impl, metadata); @@ expression prog_expr, impl, metadata; @@ -if (prog_expr) { -nir_metadata_preserve(impl, metadata); -return true; -} else { -nir_metadata_preserve(impl, nir_metadata_all); -return false; -} +bool progress = prog_expr; +return nir_progress(progress, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all); -return prog; +return nir_progress(prog, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all); +nir_progress(prog, impl, metadata); @@ expression impl, metadata; @@ -nir_metadata_preserve(impl, metadata); -return true; +return nir_progress(true, impl, metadata); @@ expression impl; @@ -nir_metadata_preserve(impl, nir_metadata_all); -return false; +return nir_no_progress(impl); @@ identifier other_prog, prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} -other_prog |= prog; +other_prog = other_prog | nir_progress(prog, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +nir_progress(prog, impl, metadata); @@ identifier other_prog, prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -other_prog = true; -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +other_prog = other_prog | nir_progress(prog, impl, metadata); @@ expression prog_expr, impl, metadata; identifier prog; @@ -if (prog_expr) { -nir_metadata_preserve(impl, metadata); -prog = true; -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +bool impl_progress = prog_expr; +prog = prog | nir_progress(impl_progress, impl, metadata); @@ identifier other_prog, prog; expression impl, metadata; @@ -if (prog) { -other_prog = true; -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +other_prog = other_prog | nir_progress(prog, impl, metadata); @@ expression prog_expr, impl, metadata; identifier prog; @@ -if (prog_expr) { -prog = true; -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +bool impl_progress = prog_expr; +prog = prog | nir_progress(impl_progress, impl, metadata); @@ expression prog_expr, impl, metadata; @@ -if (prog_expr) { -nir_metadata_preserve(impl, metadata); -} else { -nir_metadata_preserve(impl, nir_metadata_all); -} +bool impl_progress = prog_expr; +nir_progress(impl_progress, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -nir_metadata_preserve(impl, metadata); -prog = true; +prog = nir_progress(true, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -} -return prog; +return nir_progress(prog, impl, metadata); @@ identifier prog; expression impl, metadata; @@ -if (prog) { -nir_metadata_preserve(impl, metadata); -} +nir_progress(prog, impl, metadata); @@ expression impl; @@ -nir_metadata_preserve(impl, nir_metadata_all); +nir_no_progress(impl); @@ expression impl, metadata; @@ -nir_metadata_preserve(impl, metadata); +nir_progress(true, impl, metadata); squashme! sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog') Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722>	2025-02-26 15:19:53 +00:00
Hyunjun Ko	ee52885aec	anv: Add one more flag of VideoCapability for encoding. ... Adds VK_VIDEO_ENCODE_H264/5_CAPABILITY_PER_PICTURE_TYPE_MIN_MAX_QP_BIT_KHR. This also fixes dEQP-VK.video.capabilities.h265_encode_capabilities_query. Signed-off-by: Hyunjun Ko <zzoon@igalia.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33729>	2025-02-26 01:38:55 +00:00
Lionel Landwerlin	91f36ba5b6	anv: fix missing 3DSTATE_PS:Kernel0MaximumPolysperThread programming ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 815d2e3e8b ("anv: move 3DSTATE_PS to partial packing") Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33712>	2025-02-25 23:42:01 +00:00