Commit graph

159575 commits

Author SHA1 Message Date
Daniel Schürmann
163c97e6a7 radv/rt: separate shader compilation
With this patch, we compile separately
 - general shaders (raygen, miss, callable)
 - closest-hit shaders
 - traversal shader (incl. all intersection / any-hit shaders)

Each shader uses the following scheme:

  if (shader_pc == shader_va) {
     <shader code>
  }
  next = select_next_shader(shader_va)
  jump next

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
defdcd2058 aco: adjust RT prolog for shader functions [disables RT]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
302649dda1 radv/rt: adjust lower_rt_instructions() for shader functions [disables RT]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
b33c01b00f radv/rt: set up RT shader args for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Friedrich Vock
365f3346f8 radv: Disable capture/replay handles
They don't work with separate compilation. Fixing this involves some
refactoring work, which will come in future MRs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
6a5eaa25ef radv/rt: create compile_rt_prolog() function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
09e4535f20 radv/rt: don't write cache hit feedback per stage.
Too much boilerplate for no benefit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
7f2a569ec5 radv/rt: reference library shaders during radv_rt_fill_stage_info()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
772b5b3758 radv/rt: add and use specialized cache search/insert functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
62b4380acb radv/rt: pass radv_ray_tracing_pipeline to RT shader creation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
8fb7df92c0 radv/rt: replace pCreateInfo with VkPipelineCreateFlags in rt_variables
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d506fe3397 radv/rt: change RT main shader to MESA_SHADER_INTERSECTION
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
81e48613b9 radv/rt: implement radv_rt_nir_to_asm()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
99466ca185 radv/rt: implement radv_nir_lower_rt_abi to lower RT shaders for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d4409769c7 radv/shader_info: add RT stages to radv_get_user_data_0()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
c75619b268 radv/rt: extend radv_pipeline_group_handle with shader VAs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
870e4d285e radv/rt: adjust shared_size when lowering hit_attribs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
393f3426b6 aco: implement select_program_rt()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
f66f274304 aco: implement nir_intrinsic_load_resume_shader_address_amd
Similar to p_constaddr but targeting BBs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
be9f4a80b8 nir: add nir_intrinsic_resume_shader_address_amd
This intrinsic returns a pointer to the end of the shader
and is intended for stitched binaries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
1be3a558f2 radv: add remaining RT shader args for separate compilation
Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Kenneth Graunke
be235ce938 intel/genxml: Drop Tiled Resource Mode fields
Neither RENDER_SURFACE_STATE nor VDENC_SURFACE_CONTROL_BITS have a
Tiled Resource Mode field anymore.  The RENDER_SURFACE_STATE field
was also overlapping with the L1 Cache Control settings field.

This also drops the assignment of that field in isl, because we were
just explicitly setting it to NONE (0) which is already the default
value genxml packing will give us.  That saves us some ifdefs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23449>
2023-06-08 00:07:40 +00:00
Nanley Chery
e7c63fc51c iris: Assert against FCV_CCS_E for blitter writes
The FCV feature is documented to occur on regular render writes. Blitter
writes don't fall under that category. So, if the destination resource
of a blitter write had the FCV aux usage, we would have a good reason to
change the aux usage of the access to plain CCS_E.

We don't actually need to write code to handle this. iris doesn't use
any compression on blitter writes. Make that obvious with an assert.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
0f0e929655 iris: Avoid FCV_CCS_E for shader image accesses
The FCV feature is documented to occur on regular render writes. Images
are written to with the DC data port however.

By using plain CCS_E for image writes, we can avoid the COMPRESSED_CLEAR
aux state in more cases. Doing this can avoid full resolves or partial
resolves for future accesses.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
39ec3c180e iris: Avoid extra CCS_E flushes for aux mode changes
We're going to start toggling between FCV_CCS_E and CCS_E. When
switching aux modes, flush_previous_aux_mode would typically perform
cache flushes for good reason. In the case of switching between CCS_E
with FCV on vs off, we haven't found aux mode flushing to matter. Treat
both CCS_E variants as equivalent to avoid extra cache flushing.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
0c204277e7 intel: Rename the GFX12_CCS_E aux-usage to FCV_CCS_E
Rename the isl_aux_usage enum to clarify that it is optional on gfx125.

The new name comes from the Alchemist docs, where the feature is
referred to as "Fast Clear Optimization (FCV)".

The rename was done with this command:

   git grep -l "GFX12_CCS_E" | xargs sed -ie "s/GFX12_CCS_E/FCV_CCS_E/g"

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
dcc1d1be19 iris: Drop a GFX12_CCS_E check in can_fast_clear_color
The 8 bpp restriction isn't specific to the automatic fast clear
behavior of GFX12_CCS_E. It is applicable to both GFX12_CCS_E and CCS_E.
Drop the aux usage check completely.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:38 +00:00
Caio Oliveira
0f54621564 compiler/types: Make key in subroutine_name more effective
Use the string itself as a key for searching -- and the internal
allocated name as a key when storing.

Because record_key_hash doesn't consider the name field, which is
the only used field for a SUBROUTINE type, the hash key was always
the same for all types.  Using the name fixes this.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23277>
2023-06-07 23:01:59 +00:00
Mark Janes
d57eedefa9 anv: convert Wa_14010455700 to use workaround mechanism
The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>
2023-06-07 22:30:34 +00:00
Mark Janes
7868c8698f iris: convert Wa_14010455700 to use workaround mechanism
The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>
2023-06-07 22:30:34 +00:00
Simon Ser
5b2d71ab88 Update OpenGL headers
Token from commit 91cdaf381d77b6e700654ecd78cb88a95c1fde1a of
OpenGL-Registry.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23144>
2023-06-07 20:47:03 +00:00
Marek Olšák
6dc1ae1759 amd: drop support for LLVM 14
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
ab5662dc61 amd: drop support for LLVM 13
We can remove the LLVM 13 Wave32 discard workaround and
SI_PROFILE_IGNORE_LLVM13_DISCARD_BUG that disabled the workaround.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
3a9f8730f5 amd: drop support for LLVM 12
The demote emulation can be removed, and FS_CORRECT_DERIVS_AFTER_KILL
can be removed because it's always enabled on LLVM >= 13.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
4c8cc26fd8 amd: drop support for LLVM 11
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Yogesh Mohan Marimuthu
7761e93c8c ac/gpu_info: rearrange if checks for dcc config
rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Yogesh Mohan Marimuthu
6f968f46fe ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile
With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Christian Gmeiner
add14d6cfb etnaviv: nir: do not call nir_lower_idiv(..) unconditionally
GPUs without native integers lower idiv in lower_int_to_float and
there is no need to call nir_lower_idiv(..) for such GPUs.

Fixes nir crashes I am seeing with gc2000_gles2 CI job.

Fixes: f532202f2d ("etnaviv: use nir_lower_idiv(..) before opt loop")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23450>
2023-06-07 19:02:36 +00:00
Iago Toral Quiroga
c5b6a65f81 v3d,v3dv: fix viewport offset for negative viewport center
If the viewport center is not positive we can't express it
through the fine coordinates, which are unsigned, and we
need to use the coarse coordinates too.

Fixes new crashes in Vulkan CTS 1.3.6.0:
dEQP-VK.draw.renderpass.offscreen_viewport.*negative*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:56 +00:00
Iago Toral Quiroga
78dc0bc589 broadcom/cle: fix up viewport offset packet definition for V3D 4.1+
These are split between fine and coarse coordinates. We have only been
using fine until now, so we kept the same naming convention we had
prior to V3D 4.1 for simplicity, but we will start using the coarse
coordinates soon too.

Also, the signedness was reversed: coarse coordinates are signed and
fine coordinates are unsigned.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:56 +00:00
Iago Toral Quiroga
84af2cb44a v3dv: simplify scissor setup for negative viewport height
KHR_maintenance1 allows clients to specify a negative
height, but not a negative width, so assert on that and
simplify the computations for the horizontal dimension.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:55 +00:00
Iago Toral Quiroga
226c62b745 v3dv: remove bogus viewport code
This is incorrectly undoing the code right above it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:55 +00:00
Mike Blumenkrantz
40433dea14 zink: add a ci flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
02bf3e3c0a zink: enable EXT_shader_object globally with have_EXT_attachment_feedback_loop_dynamic_state
this leaves fbfetch as the lone case where it can't yet be used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
d17c081b7c zink: use dynamic state for feedback loops when available
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
88d42b6230 zink: hook up VK_EXT_attachment_feedback_loop_dynamic_state
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Karmjit Mahil
51db63538c pvr: Fix PDS temps allocation on fragment stage
Previously the USC temps count was incorrectly being used for the
PDS temps count.

It was causing:
  csbgen/pvr_packet_helpers.h:79:
    __pvr_uint: Assertion `v <= max' failed.

This fixes the assert being hit on:
  dEQP-VK.ubo.random.basic_arrays.2
  dEQP-VK.ubo.random.all_shared_buffer.3
  dEQP-VK.ubo.random.all_shared_buffer.48
  dEQP-VK.ubo.random.all_out_of_order_offsets.3

This does not fully fix the tests though.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>
2023-06-07 18:01:02 +00:00
Karmjit Mahil
8809758fbc pvr: Rename temps_count to pds_temps_count
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>
2023-06-07 18:01:02 +00:00
Karmjit Mahil
d070e31020 pvr: Fix draw indirect page faults due to missing index list buffer
Fixes:
  dEQP-VK.draw.renderpass.basic_draw.draw_indirect.*
  dEQP-VK.draw.renderpass.basic_draw.draw_indexed_indirect.*

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23491>
2023-06-07 17:38:54 +00:00