Commit graph

66874 commits

Author SHA1 Message Date
Eric Anholt
7c0acd8535 nine: Don't use the otherwise-dead SFL opcode in an unreachable path.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2014-11-24 14:56:21 -08:00
Matt Turner
057e6e5251 i965/gen6/gs: Don't declare a src_reg with struct.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 14:09:23 -08:00
Matt Turner
ff966aff99 i965/disasm: Fix all32h/any32h predicate disassembly.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-11-24 14:09:23 -08:00
Matt Turner
b754e52532 glsl: Fix tautological comparison.
Caught by clang.

warning: comparison of constant -1 with expression of type
         'ir_texture_opcode' is always false
      [-Wtautological-constant-out-of-range-compare]
      if (op == -1)
          ~~ ^  ~~

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 14:09:23 -08:00
Matt Turner
024db256d4 util: Prefer atomic intrinsics to inline assembly.
Cuts a little more than 1k of .text size from i915g.

This was previously done in commit 5f66b340 and subsequently reverted in
commit 3661f757 after bug 30514 was filed. I believe the cause of bug
30514 wasn't anything related to cross compiling, but rather that the
toolchain used defaulted to -march=i386, and i386 doesn't have the
CMPXCHG or XADD instructions used to implement the intrinsics.

So we reverted a patch that improved things so that we didn't break
compilation for a platform that never could have worked anyway.
2014-11-24 14:09:23 -08:00
Matt Turner
99cebffda9 util: Implement assume() for clang.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-11-24 14:09:23 -08:00
Matt Turner
56ac25918a i965: Don't overwrite the math function with conditional mod.
Ben was asking about the undocumented restriction that the math
instruction cannot use the dependency control hints. I went to reconfirm
and disabled the is_math() check in opt_set_dependency_control() and saw
that the disassembled math instructions with dependency hints had a
bogus math function. We were mistakenly overwriting it by setting an
empty conditional mod.

Unfortunately, this wasn't the cause of the aforementioned problem (I
reproduced it). This bug is benign, since we don't set dependeny hints
on math instructions -- but maybe some day.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 14:07:32 -08:00
Matt Turner
f5bef2d2e5 i965: Assert that math instructions don't have conditional mod.
The math function field is at the same location as conditional mod.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 14:06:39 -08:00
Matt Turner
803a744507 glsl: Remove unused ast copy constructors.
These were added in commits a760c738 and 43757135 to be used in
implementing C-style aggregate initializers (commit 1b0d6aef). Paul
rewrote that code in commit 0da1a2cc to use GLSL types, rather than
AST types, leaving these copy constructors unused.

Tested by making them private and providing no definition.
2014-11-24 14:06:39 -08:00
Matt Turner
baff470823 glapi: Remove dead gl_offsets.py.
Dead since commit 07b85457.
2014-11-24 14:02:54 -08:00
Matt Turner
76ef547be7 glapi: Remove dead extension_helper.py.
Dead since commit 3d16088f.
2014-11-24 14:02:54 -08:00
Eric Anholt
52a7cb2ec4 vc4: Fix some inconsistent indentation. 2014-11-24 12:37:33 -08:00
Eric Anholt
6f4adb7483 vc4: Don't forget to actually connect the fence code.
I thought I'd tested this.
2014-11-24 12:37:33 -08:00
Eric Anholt
fa74ec7e98 vc4: Add a note about a piece of errata I've learned about.
Right now in my environment I've only got a small CMA area, so this
constraint ends up holding.
2014-11-24 12:37:33 -08:00
Chris Forbes
2b4fe85f0e mesa: Fix Get(GL_TRANSPOSE_CURRENT_MATRIX_ARB) to transpose
This was just returning the same value as GL_CURRENT_MATRIX_ARB.
Spotted while investigating something else in apitrace.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 21:55:47 +13:00
Chris Forbes
129178893b glsl: Generate unique names for each const array lowered to uniforms
Uniform names (even for hidden uniforms) are required to be unique; some
parts of the compiler assume they can be looked up by name.

Fixes the piglit test: tests/spec/glsl-1.20/linker/array-initializers-1

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 21:07:56 +13:00
Chris Forbes
adefccd12a i965: Handle nested uniform array indexing
When converting a uniform array reference to a pull constant load, the
`reladdr` expression itself may have its own `reladdr`, arbitrarily
deeply. This arises from expressions like:

   a[b[x]]     where a, b are uniform arrays (or lowered const arrays),
               and x is not a constant.

Just iterate the lowering to pull constants until we stop seeing these
nested. For most shaders, there will be only one pass through this loop.

Fixes the piglit test:
tests/spec/glsl-1.20/linker/double-indirect-1.shader_test

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24 21:07:29 +13:00
Dave Airlie
c88385603a r600g: do all CUBE ALU operations before gradient texture operations (v2.1)
This moves all the CUBE section above the gradients section,
so that the gradient emission happens on one block which
is what sb/hardware expect.

v2: avoid changes to bytecode by using spare temps
v2.1: shame gcc, oh the shame. (uninit var warnings)

Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-24 13:33:07 +10:00
Dave Airlie
38ec184419 r600: fix texture gradients instruction emission (v2)
The piglit tests were failing, and it appeared to be SB
optimising out things, but Glenn pointed out the gradients
are meant to be clause local, so we should emit the texture
instructions in the same clause. This moves things around
to always copy to a temp and then emit the texture clauses
for H/V.

v2: Glenn pointed out we could get another ALU fetch in
the wrong place, so load the src gpr earlier as well.

Fixes at least:
./bin/tex-miplevel-selection textureGrad 2D

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-24 10:41:30 +10:00
Ilia Mirkin
fecae4625c nv50,nvc0: buffer resources can be bound as other things down the line
res->bind is not an indicator of how the resource is currently bound.
buffers can be rebound across different binding points without changing
underlying storage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23 15:43:28 -05:00
Ilia Mirkin
e80a0a7d9a nv50,nvc0: actually check constbufs for invalidation
The number of vertex buffers has nothing to do with the number of bound
constbufs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23 15:43:27 -05:00
Ilia Mirkin
7d07083cfd nv50/ir: set neg modifiers on min/max args
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=86618
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23 15:43:27 -05:00
Chris Forbes
89b9ef937c mesa: Fix function name in GetActiveUniformName error
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2014-11-23 15:04:15 +13:00
Stéphane Marchesin
3d9c1a9dd6 i915g: Fallback copy_render for ZS formats
These don't work out of the box, need more work, maybe with a proxy
format?

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:41 -08:00
Stéphane Marchesin
90207340c7 i915g: Add back 4444 and 5551 formats
Now that we have the transfers working, we can re-add those formats.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:40 -08:00
Stéphane Marchesin
1e47510df7 i915g: Don't limit blitter to POT textures
Now that we have NPOT support for u_blitter, there is no reason to
limit this any longer.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:40 -08:00
Stéphane Marchesin
e30c799da9 i915g: Align all texture dimensions to the next POT
This creates a usable layout for all NPOT textures. Of course these
still have lots of limitations, but at least we can render to a
level.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:40 -08:00
Stéphane Marchesin
675019584c i915g: Fix typos
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:40 -08:00
Stéphane Marchesin
2ed24b2c31 i915g: Fix maxlod computation.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:39 -08:00
Stéphane Marchesin
0220a428d7 i915g: Fix offset for level != 0
For NPOT texture layouts, we want to be able to access texture levels
other than 0 directly. Since the hw doesn't support that, We do it by
adding the offset directly.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:39 -08:00
Stéphane Marchesin
a9b0787076 i915g: Don't write constants past I915_MAX_CONSTANT
This happens with glsl-convolution-1, where we have 64 constants. This
doesn't make the test pass (we don't have 64 constants anyway, only
32) but this prevents it from crashing.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:39 -08:00
Stéphane Marchesin
5f61744adb i915g: Don't hardcode array size for phase count
This is an array of temp registers, so use I915_MAX_TEMPORARY for the size.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22 00:13:39 -08:00
David Heidelberg
25b00f4617 draw: allow LLVM use on non-SSE2 X86 cpus
This patch remove workaround related to LLVM < 3.2 bug.

Original bug has been closed as fixed in 2011.
At this moment gallium requires LLVM 3.3 (2013).

LLVM has been tested without SSE2 support in commit
ca70de9bd2 and removed after requiring
LLVM 3.3 in commit 013ff2fae1

Original LLVM bug: http://llvm.org/bugs/show_bug.cgi?id=6960

Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-11-22 04:29:00 +00:00
Emil Velikov
7d854c9771 docs: add news item and link release notes for mesa 10.3.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-11-22 04:26:06 +00:00
Emil Velikov
34616bc922 docs: Add sha256 sums for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 72c27d7a3a)
2014-11-22 04:24:32 +00:00
Emil Velikov
9e168ad903 Add release notes for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 26c8ecd85d)
2014-11-22 04:24:29 +00:00
Kenneth Graunke
a746be259d i965: Make Gen4-5 push constants call _mesa_load_state_parameters too.
In commit 5e37a2a4a8, I made the pull constant code stop calling
_mesa_load_state_parameters() when there were no pull parameters.

This worked fine on Gen6+ because the push constant code also called
it if there were any push constants.  However, the Gen4-5 push constant
code wasn't doing this.  This patch makes it do so, like the Gen6+ code.

A better long term solution would be to make core Mesa just handle this
for us when necessary.

Fixes around 8766 Piglit tests on Ironlake, and probably Gen4 as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2014-11-21 16:25:17 -08:00
Ben Widawsky
88fea85f09 i965/vec4/gen8: Handle the MUL dest hazard exception
Fix one of the few cases where we can't reliable touch the destination hazard
bits. I am explicitly doing this patch individually so it is easy to backport. I
was tempted to do this patch before the previous patch which reorganized the
code, but I believe even doing that first, this is still easy to backport.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-21 12:08:46 -08:00
Ben Widawsky
156f565f9e i965/vec4: Extract depctrl hazards
Move this to a separate function so that we can begin to add other little
caveats without making too big a mess.

NOTE: There is some desire to improve this function eventually, but we need to
fix a bug first.

v2:
Use const for the inst for the hazard check (Matt)
Invert safe logic to get rid of the double negative (Matt)
Add PRM reference for predicates (Matt)
Add note about empirical evidence for math (Matt)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-21 12:08:46 -08:00
Matt Turner
40c0d79d29 i965/fs: Remove is_valid_3src().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21 10:26:44 -08:00
Matt Turner
0777775274 i965/fs: Remove is_valid_3src() checks from emit_lrp.
The visitor emits MOVs to temporary registers for immediates, so these
never trigger. For further proof, check case ir_triop_fma.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21 10:26:44 -08:00
Matt Turner
1fdc75fde4 i965/fs: Remove unused apply_stride().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21 10:26:44 -08:00
Matt Turner
279c1c80b6 i965/fs: Move ip_record class to its one use.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21 10:26:44 -08:00
Matt Turner
d9432af45a i965: Move common fields into backend_instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-21 10:26:42 -08:00
Matt Turner
bd50213929 i965: Combine offset/texture_offset fields.
texture_offset was only used by some texturing operations, and offset
was only used by spill/unspill and some URB operations. These fields are
never used at the same time.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-21 10:26:38 -08:00
Marek Olšák
645b471d61 radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes
So far it has been compiled into pretty ugly code (8 instructions or so
for either opcode).

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-11-21 12:15:58 +01:00
Eric Anholt
21577571b3 vc4: Update for new kernel ABI with async execution and waits.
Our submits now return immediately and you have to manually wait for
things to complete if you want to (like a normal driver).
2014-11-20 13:07:07 -08:00
Ville Syrjälä
390799c496 i915: Only use TEXCOORDTYPE_VECTOR with cube maps on gen2
Check that the target is GL_TEXTURE_CUBE_MAP before emitting
TEXCOORDTYPE_VECTOR texture coordinates.

I'm not sure if the hardware would like CARTESIAN coordinates
with cube maps, and as I'm too lazy to find out just emit the
VECTOR coordinates for cube maps always. For other targets use
CARTESIAN or HOMOGENOUS depending on the number of texture
coordinates provided.

Fixes rendering of the "electric" background texture in chromium-bsu
main menu. We appear to be provided with three texture coordinates
there (I'm guessing due to the funky texture matrix rotation it does).
So the code would decide to use TEXCOORDTYPE_VECTOR instead of
TEXCOORDTYPE_CARTESIAN even though we're dealing with a 2D texure.
The results weren't what one might expect.

demos/cubemap still works, which hopefully indicates that this doesn't
break things.

Also tested with:
 bin/glean -o -v -v -v -t +texCube --quick
 bin/cubemap -auto
from piglit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-11-20 21:58:57 +02:00
Ben Widawsky
ca39c46c3b i965/disasm: Properly decode branch_ctrl (gen8+)
Add support for decoding the new branch control bit. I saw two things wrong with
the existing code.

1. It didn't bother trying to decode the bit.
-  While we do not *intentionally* emit this bit today, I think it's interesting
   to see if we somehow ended up with the bit set. It may also be useful in the
   future.

2. It seemed to be the wrong bit.
-  The docs are pretty poor wrt which bit this actually occupies. To me, it
   /looks/ like it should be bit 28. I am not sure where Ken got 30 from. I
   verified it should be 28 by looking at the simulator code.

I also added the most basic support for GOTO simply so we don't need to remember
to change the function in the future.

v2:
Move the branch_ctrl check out of the if gen >= 6 check to make it more
readable. (Matt)
ENDIF doesn't have branch_ctrl (Matt + Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-20 09:45:23 -08:00
José Fonseca
56bf948e11 rtasm,translate: Re-enable SSE on Mingw64.
This reverts f4dd099171.

The src/gallium/tests/unit/translate_test.c gives the same results on
MinGW 64-bits as on Linux 64-bits.  And since MinGW is often used for
development/testing due to its convenience, it's better not to have this
sort of differences relative to MSVC.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-11-20 14:11:36 +00:00