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i965/disasm: Properly decode branch_ctrl (gen8+)

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Add support for decoding the new branch control bit. I saw two things wrong with
the existing code.

1. It didn't bother trying to decode the bit.
-  While we do not *intentionally* emit this bit today, I think it's interesting
   to see if we somehow ended up with the bit set. It may also be useful in the
   future.

2. It seemed to be the wrong bit.
-  The docs are pretty poor wrt which bit this actually occupies. To me, it
   /looks/ like it should be bit 28. I am not sure where Ken got 30 from. I
   verified it should be 28 by looking at the simulator code.

I also added the most basic support for GOTO simply so we don't need to remember
to change the function in the future.

v2:
Move the branch_ctrl check out of the if gen >= 6 check to make it more
readable. (Matt)
ENDIF doesn't have branch_ctrl (Matt + Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ben Widawsky 2014-11-18 12:20:10 -08:00
parent 56bf948e11
commit ca39c46c3b
3 changed files with 23 additions and 2 deletions
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1
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -820,6 +820,7 @@ enum opcode {
BRW_OPCODE_MSAVE = 44, /**< Pre-Gen6 */
BRW_OPCODE_MRESTORE = 45, /**< Pre-Gen6 */
BRW_OPCODE_PUSH = 46, /**< Pre-Gen6 */
BRW_OPCODE_GOTO = 46, /**< Gen8+ */
BRW_OPCODE_POP = 47, /**< Pre-Gen6 */
BRW_OPCODE_WAIT = 48,
BRW_OPCODE_SEND = 49,

22
src/mesa/drivers/dri/i965/brw_disasm.c
View file

@ -130,6 +130,17 @@ has_uip(struct brw_context *brw, enum opcode opcode)
opcode == BRW_OPCODE_HALT;
}
static bool
has_branch_ctrl(struct brw_context *brw, enum opcode opcode)
{
if (brw->gen < 8)
return false;
return opcode == BRW_OPCODE_IF ||
opcode == BRW_OPCODE_ELSE ||
opcode == BRW_OPCODE_GOTO;
}
static bool
is_logic_instruction(unsigned opcode)
{
@ -217,6 +228,11 @@ static const char *const accwr[2] = {
[1] = "AccWrEnable"
};
static const char *const branch_ctrl[2] = {
[0] = "",
[1] = "BranchCtrl"
};
static const char *const wectrl[2] = {
[0] = "",
[1] = "WE_all"
@ -1544,9 +1560,13 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
err |= control(file, "thread control", thread_ctrl,
brw_inst_thread_control(brw, inst), &space);
if (brw->gen >= 6)
if (has_branch_ctrl(brw, opcode)) {
err |= control(file, "branch ctrl", branch_ctrl,
brw_inst_branch_control(brw, inst), &space);
} else if (brw->gen >= 6) {
err |= control(file, "acc write control", accwr,
brw_inst_acc_wr_control(brw, inst), &space);
}
if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
err |= control(file, "end of thread", end_of_thread,
brw_inst_eot(brw, inst), &space);

2
src/mesa/drivers/dri/i965/brw_inst.h
View file

@ -169,9 +169,9 @@ FF(flag_reg_nr,
/* 8: */ 33, 33)
F8(flag_subreg_nr, /* 4+ */ 89, 89, /* 8+ */ 32, 32)
F(saturate, 31, 31)
FC(branch_control, 30, 30, brw->gen >= 8)
F(debug_control, 30, 30)
F(cmpt_control, 29, 29)
FC(branch_control, 28, 28, brw->gen >= 8)
F(acc_wr_control, 28, 28)
F(cond_modifier, 27, 24)
FC(math_function, 27, 24, brw->gen >= 6)