Commit graph

66874 commits

Author SHA1 Message Date
Rob Clark
036f434ac2 freedreno/a4xx: alpha blend fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-12-01 20:31:23 -05:00
Rob Clark
a7d91c33c2 freedreno/a4xx: fix DRAW initiator encoding of index size
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-12-01 20:31:23 -05:00
Rob Clark
81194ac767 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-12-01 20:31:23 -05:00
Matt Turner
5df88c2096 i965/vec4: Rewrite dead code elimination to use live in/out.
Improves 359 shaders by >=10%
         114 shaders by >=20%
          91 shaders by >=30%
          82 shaders by >=40%
          22 shaders by >=50%
           4 shaders by >=60%
           2 shaders by >=80%

total instructions in shared programs: 5845346 -> 5822422 (-0.39%)
instructions in affected programs:     364979 -> 342055 (-6.28%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
7a5cc789de i965/vec4: Track liveness of the flag register.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
b449366587 i965/fs: Remove opt_drop_redundant_mov_to_flags().
Dead code elimination now handles this.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
b37273b924 i965/fs: Use const fs_reg & rather than a copy or pointer.
Also while we're touching var_from_reg, just make it an inline function.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
60d507c3c5 i965/fs: Dead code eliminate instructions writing the flag.
Most prominently helps Natural Selection 2, which has a surprising
number shaders that do very complicated things before drawing black.

instructions in affected programs:     21052 -> 16978 (-19.35%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
bf8deb5514 i965/fs: Track liveness of the flag register.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
13f6601585 i965: Use local pointer to block_data in live intervals.
The next patch will be simplified because of this, and makes reading the
code a lot easier.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
a50915984f i965/vec4: Make live_intervals part of the vec4_visitor class.
Like in fs_visitor.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
e4d0299089 i965/fs: Treat the FB_WRITE as predicated if we're discarding.
Pre-Haswell hardware couldn't actually predicate it, but it's easier to
pretend as if it's predicated in the visitor since it will generate a
MOV from f0.1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:13 -08:00
Matt Turner
f1e5418f40 i965: Don't treat IF or WHILE with cmod as writing the flag.
Sandybridge's IF and WHILE instructions can do an embedded comparison
with conditional mod.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:12 -08:00
Matt Turner
937ddb419d i965/disasm: Disassemble tdr and tm registers properly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:42:12 -08:00
Jordan Justen
cd1b0f04be main, glsl: Bump max known desktop glsl version to 4.50
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-12-01 16:20:21 -08:00
Jordan Justen
307d22abb0 glsl/cs: Change gl_WorkGroupSize from ivec3 to uvec3
As documented in:

https://www.opengl.org/registry/specs/ARB/compute_shader.txt

  const uvec3 gl_WorkGroupSize;

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-12-01 16:20:21 -08:00
Jonathan Gray
31a46fb7a5 i965: avoid anonymous struct in float <-> VF conversions
Anonymous structures are only supported with newer versions of
GCC.  They will not work with GCC 4.2.1 used by OpenBSD or
GCC 4.4.7 shipped with RHEL6 going by a commit to fix a similiar
problem in radeonsi earlier in the year
(74388dd24b).

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2014-12-01 16:13:08 -08:00
Brian Paul
991d5cf8ce mesa: fix arithmetic error in _mesa_compute_compressed_pixelstore()
We need parenthesis around the expression which computes the number of
blocks per row.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
2014-12-01 16:30:55 -07:00
Brian Paul
691170b9c7 vbo: also print buffer object pointer in vbo_print_vertex_list()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:30:39 -07:00
Brian Paul
1e14aaa8f9 mesa: some improvements for print_list()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:30:17 -07:00
Brian Paul
c407c6d588 mesa: inline/remove _mesa_polygon_stipple()
Was not called from any other place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:30:12 -07:00
Brian Paul
f54162857c svga: fix comment typo 2014-12-01 16:30:12 -07:00
Brian Paul
953847e5a8 mesa: remove unused functions in prog_execute.c
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-12-01 16:29:55 -07:00
Brian Paul
cd8a7258b8 mesa: update glext.h to version 20141118 2014-12-01 15:22:20 -07:00
Brian Paul
ded14afa42 gallium: add include path to fix building of pipe-loader code
The pipe-loader code wasn't finding util/u_atomic.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-12-01 15:22:08 -07:00
José Fonseca
0806bf8815 graw: Avoid 'near'/'far' variables.
They are defined by windows.h, which got included slightly more
frequently than before with u_atomic.h
2014-12-01 20:24:51 +00:00
Matt Turner
120426b13d i965/fs: Clean up some whitespace in reg_allocate.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-12-01 11:32:56 -08:00
Matt Turner
2e007fd621 ra: Don't use regs as the ralloc context.
The i965 backends pass something out of 'screen', which is allocated
per-process, making using this as a ralloc context not thread-safe.

All callers ra_alloc_interference_graph() already ralloc_free() its
return value.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-12-01 11:32:54 -08:00
Matt Turner
933c678776 i965: Initialize INTEL_DEBUG once per process.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-12-01 11:32:52 -08:00
Matt Turner
82811ff176 i965: Initialize compaction tables once per process.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-12-01 11:32:51 -08:00
Matt Turner
9db278d0e2 glsl: Initialize static temporaries_allocate_names once per process.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-12-01 11:32:48 -08:00
José Fonseca
a5299e9e1c util/u_atomic: Fix the unlocked implementation.
It was totally broken:

- p_atomic_dec_zero() was returning the negation of the expected value

- p_atomic_inc_return()/p_atomic_dec_return() was
  post-incrementing/decrementing, hence returning the old value instead
  of the new

- p_atomic_cmpxchg() was returning the new value on success, instead of
  the old

It is clear this never used in the past. I wonder if it wouldn't be better to
yank it altogether.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-12-01 11:28:45 -08:00
José Fonseca
ff80b92a58 util/u_atomic: Add a simple test.
It was much easier for me to verify things build and run as expected
with this simple test, than building and testing whole Mesa.

With scons the test can be build and run merely by doing:

  scons u_atomic_test

Building the test with autotools is left as a future exercise.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-12-01 11:28:45 -08:00
Matt Turner
6df72e970c util: Make u_atomic.h typeless.
like how C11's stdatomic.h provides generic functions. GCC's __sync_*
builtins already take a variety of types, so that's simple.

MSVC and Sun Studio don't, but we can implement it with something that
looks a little crazy but is actually quite readable.

Thanks to Jose for some MSVC fixes!

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:45 -08:00
Matt Turner
41b5858a2f util: Use stdbool.h's bool rather than "boolean".
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:45 -08:00
Matt Turner
2879a77a37 util: Remove u_atomic.h's GCC inline assembly.
GCC >= 4.1 support the __sync_* intrinsics. That seems like a
sufficiently old baseline.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:45 -08:00
Matt Turner
972f8458f1 util: Remove u_atomic.h's MSVC inline assembly.
There was already an intrinsics path that implemented all of the same
functions, plus more.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:45 -08:00
Matt Turner
504062be2a util: Remove u_atomic.h's Gallium dependence.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:45 -08:00
Matt Turner
4abd20e261 util: s/INLINE/inline/ in u_atomic.h.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:44 -08:00
Matt Turner
ccad3829e3 util: Move u_atomic.h to src/util.
To be shared outside of Gallium.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-12-01 11:28:44 -08:00
Eric Anholt
3fe4d8e1e3 vc4: Introduce scheduling of QPU instructions.
This doesn't reschedule much currently, just tries to fit things into the
regfile A/B write-versus-read slots (the cause of the improvements in
shader-db), and hide texture fetch latency by scheduling setup early and
results collection late (haven't performance tested it).  This
infrastructure will be important for doing instruction pairing, though.

shader-db2 results:
total instructions in shared programs: 61874 -> 59583 (-3.70%)
instructions in affected programs:     50677 -> 48386 (-4.52%)
2014-12-01 11:00:23 -08:00
Eric Anholt
6958c404ca vc4: Drop the explicit scoreboard wait.
This is actually implicitly handled by the TLB operations.
2014-12-01 11:00:23 -08:00
Eric Anholt
334036fb64 vc4: Also deal with VPM reads at thread end.
Prevents a regression with QPU scheduling, which happens to put the no-op
reads for unused VPM contents end up at the end of the program.
2014-12-01 11:00:23 -08:00
Eric Anholt
a7b1a93137 vc4: Fix assertion about SFU versus texturing.
We're supposed to be checking that nothing else writes r4, which is done
by the TMU result collection signal, not the coordinate setup.

Avoids a regression when QPU instruction scheduling is introduced.
2014-12-01 11:00:23 -08:00
Eric Anholt
2d5784c825 vc4: Add another check for invalid TLB scoreboard handling.
This was caught by an assertion in the simulator.
2014-12-01 11:00:23 -08:00
Rob Clark
bb19f2c3c4 freedreno/a4xx: invalidate cache when vbo's change
Otherwise vertex shader can see stale cache data.  This in particular
happens when the same vbo is updated and reused.  Not sure yet if vbo's
at differing addresses but bound to same vertex buffer slot could have
issues, but seems safest to flush whenever new vertex buffers are bound.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-12-01 12:02:25 -05:00
Ilia Mirkin
ebbd34a468 st/mesa: avoid exposing EXT_texture_integer for pre-GLSL 1.30
For drivers building up to GL(ES)3, only expose the actual extension if
the API will let it be used (e.g. via overrides/debug flags that enable
higher versions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-11-30 13:04:29 -05:00
Ilia Mirkin
4907c31385 freedreno/a3xx: add missing integer formats and enable rendering
The mesa state tracker doesn't fall back on similar integer formats, so
they must all be provided. Remove the restriction against integer color
rendering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-11-30 13:04:28 -05:00
Ilia Mirkin
82104c19f3 freedreno/a3xx: enable sampling from integer textures
We need to produce a u32 destination type on integer sampling
instructions, so keep that in a shader key set based on the
currently-bound textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-11-30 13:04:28 -05:00
Ilia Mirkin
8e336ef55b freedreno: allow each generation to hook into sampler view setting
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-11-30 13:04:28 -05:00