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vc4: Add another check for invalid TLB scoreboard handling.
This was caught by an assertion in the simulator.
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parent
bb19f2c3c4
commit
2d5784c825
3 changed files with 39 additions and 8 deletions
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@ -244,3 +244,26 @@ qpu_set_cond_mul(uint64_t inst, uint32_t sig)
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return (inst & ~QPU_COND_MUL_MASK) | QPU_SET_FIELD(sig, QPU_COND_MUL);
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}
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bool
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qpu_waddr_is_tlb(uint32_t waddr)
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{
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switch (waddr) {
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case QPU_W_TLB_COLOR_ALL:
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case QPU_W_TLB_COLOR_MS:
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case QPU_W_TLB_Z:
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return true;
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default:
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return false;
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}
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}
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bool
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qpu_inst_is_tlb(uint64_t inst)
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{
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uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
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return (qpu_waddr_is_tlb(QPU_GET_FIELD(inst, QPU_WADDR_ADD)) ||
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qpu_waddr_is_tlb(QPU_GET_FIELD(inst, QPU_WADDR_MUL)) ||
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sig == QPU_SIG_COLOR_LOAD ||
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sig == QPU_SIG_WAIT_FOR_SCOREBOARD);
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}
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@ -133,6 +133,9 @@ uint64_t qpu_set_sig(uint64_t inst, uint32_t sig);
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uint64_t qpu_set_cond_add(uint64_t inst, uint32_t cond);
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uint64_t qpu_set_cond_mul(uint64_t inst, uint32_t cond);
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bool qpu_waddr_is_tlb(uint32_t waddr);
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bool qpu_inst_is_tlb(uint64_t inst);
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static inline uint64_t
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qpu_load_imm_f(struct qpu_reg dst, float val)
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{
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@ -91,11 +91,17 @@ writes_sfu(uint64_t inst)
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void
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vc4_qpu_validate(uint64_t *insts, uint32_t num_inst)
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{
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bool scoreboard_locked = false;
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for (int i = 0; i < num_inst; i++) {
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uint64_t inst = insts[i];
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if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_PROG_END)
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if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_PROG_END) {
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if (qpu_inst_is_tlb(inst))
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scoreboard_locked = true;
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continue;
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}
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/* "The Thread End instruction must not write to either physical
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* regfile A or B."
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@ -103,6 +109,11 @@ vc4_qpu_validate(uint64_t *insts, uint32_t num_inst)
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assert(QPU_GET_FIELD(inst, QPU_WADDR_ADD) >= 32);
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assert(QPU_GET_FIELD(inst, QPU_WADDR_MUL) >= 32);
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/* Can't trigger an implicit wait on scoreboard in the program
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* end instruction.
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*/
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assert(!qpu_inst_is_tlb(inst) || scoreboard_locked);
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/* Two delay slots will be executed. */
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assert(i + 2 <= num_inst);
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@ -141,13 +152,7 @@ vc4_qpu_validate(uint64_t *insts, uint32_t num_inst)
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for (int i = 0; i < 2; i++) {
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uint64_t inst = insts[i];
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assert(QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_COLOR_LOAD);
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assert(QPU_GET_FIELD(inst, QPU_SIG) !=
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QPU_SIG_WAIT_FOR_SCOREBOARD);
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assert(!writes_reg(inst, QPU_W_TLB_COLOR_MS));
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assert(!writes_reg(inst, QPU_W_TLB_COLOR_ALL));
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assert(!writes_reg(inst, QPU_W_TLB_Z));
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assert(!qpu_inst_is_tlb(inst));
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}
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/* "If TMU_NOSWAP is written, the write must be three instructions
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