Commit graph

66874 commits

Author SHA1 Message Date
Chia-I Wu
d3c5976a3b ilo: decode INTERFACE_DESCRIPTOR_DATA
This is at least much better than decoding as blobs.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-07 23:33:21 +08:00
Matt Turner
58a54091a9 i965/fs: Wire up control flow correctly in predicated break pass.
When the earlier block ended with control flow, we'd mistakenly remove
some of its links to its children. The same happened with the later
block.

Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-06 16:37:56 -08:00
Matt Turner
f0cfc4fca0 i965/cfg: Add functions to get first and last non-CF instructions.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-06 16:37:56 -08:00
Kenneth Graunke
a16ca4ac6a glsl: Skip loop-too-large heuristic if indexing arrays of a certain size
A pattern in certain shaders is:

   uniform vec4 colors[NUM_LIGHTS];

   for (int i = 0; i < NUM_LIGHTS; i++) {
      ...use colors[i]...
   }

In this case, the application author expects the shader compiler to
unroll the loop.  By doing so, it replaces variable indexing of the
array with constant indexing, which is more efficient.

This patch extends the heuristic to see if arrays accessed within the
loop are indexed by an induction variable, and if the array size exactly
matches the number of loop iterations.  If so, the application author
probably intended us to unroll it.  If not, we rely on the existing
loop-too-large heuristic.

Improves performance in a phong shading microbenchmark by 2.88x, and a
shadow mapping microbenchmark by 1.63x.  Without variable indexing, we
can upload the small uniform arrays as push constants instead of pull
constants, avoiding shader memory access.  Affects several games, but
doesn't appear to impact their performance.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
2014-11-06 16:30:47 -08:00
Kenneth Graunke
4f22db5fbb glsl: Lower constant arrays to uniform arrays.
Consider GLSL code such as:

   const ivec2 offsets[] =
      ivec2[](ivec2(-1, -1), ivec2(-1, 0), ivec2(-1, 1),
              ivec2(0, -1),  ivec2(0, 0),  ivec2(0, 1),
              ivec2(1, -1),  ivec2(1, 0),  ivec2(1, 1));

   ivec2 offset = offsets[<non-constant expression>];

Both i965 and nv50 currently handle this very poorly.  On i965, this
becomes a pile of MOVs to load the immediate constants into registers,
a pile of scratch writes to move the whole array to memory, and one
scratch read to actually access the value - effectively the same as if
it were a non-constant array.

We'd much rather upload large blocks of constant data as uniform data,
so drivers can simply upload the data via constbufs, and not have to
populate it via shader instructions.

This is currently non-optional because both i965 and nouveau benefit
from it, and according to Marek radeonsi would benefit today as well.
(According to Tom, radeonsi may want to handle this itself in the long
term, but we can always add a flag when it becomes useful.)

Improves performance in a terrain rendering microbenchmark by about 2x,
and cuts the number of instructions in about half.  Helps a lot of
"Natural Selection 2" shaders, as well as one "HOARD" shader.

total instructions in shared programs: 5473459 -> 5471765 (-0.03%)
instructions in affected programs:     5880 -> 4186 (-28.81%)

v2: Use ir_var_hidden to avoid exposing the new uniform via the GL
    uniform introspection API.

v3: Alphabetize Makefile.sources properly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77957
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-06 16:20:01 -08:00
Kenneth Graunke
0c0bfb2ead glsl: Add infrastructure for "hidden" uniforms.
In the compiler, we'd like to generate implicit uniforms for internal
use.  These should not be visible via the GL uniform introspection API.

To support that, we add a new ir_variable::how_declared value of
ir_var_hidden, and plumb that through to gl_uniform_storage.

v2 (idr): Fix some memory management issues in
move_hidden_uniforms_to_end.  The comment block on the function has more
details.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2014-11-06 16:20:01 -08:00
Timothy Arceri
1378617218 mesa: Add SSE 4.1 optimisation for glDrawElements.
Makes use of SSE 4.1 to speed up compute of min and max elements.

Callgrind cpu usage results from pts benchmarks:

Openarena 0.8.8: 3.67% -> 1.03%
UrbanTerror: 2.36% -> 0.81%

V5:
- actually make use of the optimisation in android (Emil Velikov)
- set a better array size limit for using SSE and added TODO

V4:
- fixed bugs with incrementing pointer and updating counters

V3:
- Removed sse_minmax.c from Makefile.sources
- handle the first few values without SSE until the pointer is aligned
 and use _mm_load_si128 rather than _mm_loadu_si128
- guard the call to the SSE code better at build time

V2:
- removed GL* types
- use _mm_store_si128() rather than _mm_store_ps()
- add runtime check for SSE
- use aligned attribute for local mix/max
- bunch of tidyups

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
2014-11-06 11:39:59 -08:00
Matt Turner
9557cf7d0d i965: Remove non-existent vertical strides from array.
These never existed, as far as I can tell.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-06 11:11:37 -08:00
Matt Turner
cc3b028a4f i965: Convert stride/width/execution size macros into enums.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-06 11:11:34 -08:00
Matt Turner
497122a338 i965/fs: Remove force uncompressed stack.
Last use was in shader_time.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-06 11:09:46 -08:00
Matt Turner
7e19e6c877 i965/fs: Use execution size of 1 for some shader_time operations.
The ADDs depended on dispatch_width, which really isn't what we wanted.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-06 11:09:46 -08:00
Matt Turner
ee7e6009a9 i965/fs: Use mov(4) instructions to read timestamp.
We only want fields 0-2.
2014-11-06 11:09:45 -08:00
Jan Vesely
cd93d82ba9 clover: Fix build after llvm r221375
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
2014-11-06 11:39:36 -05:00
Emil Velikov
ba0bb4227e egl_dri2: do not leak dri2_dpy->driver_configs
Walk through the list and free each config, and finally free the list
itself. Freeing approx 20KiB of memory, according to valgrind.
Inspired by a similar patch by enpeng xu.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-11-06 13:23:51 +00:00
Emil Velikov
54a065d9a6 ilo: add two missing headers to the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-11-06 13:19:08 +00:00
Alexandros Frantzis
f53b6d0134 Releasing a surfaceless EGL context doesn't release underlying DRI context.
driUnbindContext() checks for valid drawables before calling the driver
unbind function. In case of Surfaceless contexts, the drawables are always
Null and we end up not releasing the underlying DRI context. Moving the
call to the driver function before the drawable validity checks fixes things.

Steps to trigger this bug are following:

   - create surfaceless context and make it current
   - make some other context current
   - {another thread} destroy surfaceless context
   - make another context current

Signed-off-by: Alexandros Frantzis <Alexandros.Frantzis@canonical.com>
Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74563
2014-11-06 13:40:39 +02:00
Chia-I Wu
cd745d46ce ilo: let ilo_shader_compile_cs() return a dummy shader
The dummy shader sends an EOT message to end itself.  There are many more
works need to be done on the compiler side before we can advertise
PIPE_CAP_COMPUTE.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:45:20 +08:00
Chia-I Wu
ce40fa3a4a ilo: hook up launch_grid()
All we need to do is to upload the input data and call
ilo_render_emit_launch_grid() with space checking.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:53 +08:00
Chia-I Wu
a1a701877a ilo: add ilo_render_emit_launch_grid()
ilo_render_emit_launch_grid() emits all the hardware states needed for a
launch_grid() call.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:53 +08:00
Chia-I Wu
9dd596c99f ilo: improve media command helpers
They were written for Gen6 but mostly untested.  Make them work for Gen7+.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:53 +08:00
Chia-I Wu
a2054af85c ilo: disassemble DP DC messages
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:53 +08:00
Chia-I Wu
58099ed0a1 ilo: disassemble TS messages
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:53 +08:00
Chia-I Wu
bfaed536dd ilo: update genhw headers for media pipeline
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:45 +08:00
Chia-I Wu
207eccc5bf ilo: add ilo_finalize_compute_states()
It updates the handles of the global bindings.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:31 +08:00
Chia-I Wu
9feb637cd0 ilo: use a dynamic array for global bindings
Use util_dynarray in ilo_set_global_binding() to allow for unlimited number of
global bindings.  Add a comment for global bindings.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:43:31 +08:00
Chia-I Wu
1d51947693 ilo: add kernel queries for compute shaders
We need to know the local/input/private sizes and others.  This is not
complete.  We need many others for CURBE setup.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:42:19 +08:00
Chia-I Wu
99742998fc ilo: fix compute params
Based on beignet, hardware capabilities, and OpenCL requirements.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:26:34 +08:00
Chia-I Wu
510a1a9012 ilo: add eu_count and thread_count to ilo_dev_info
They will be used to report compute params or program compute states.
thread_count can also be used for 3DSTATE_VS.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:26:34 +08:00
Chia-I Wu
29253f44d0 ilo: fix intel_bo_wait() on kernel 3.17
drm_intel_gem_bo_wait() with negative timeout is broken on kernel 3.17.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-11-06 10:26:34 +08:00
Ian Romanick
93a92d2c69 mesa: Silence unused parameter warning in check_context_limits in non-debug builds
../../src/mesa/main/context.c: In function 'check_context_limits':
../../src/mesa/main/context.c:733:41: warning: unused parameter 'ctx' [-Wunused-parameter]

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-05 09:36:04 -08:00
Ian Romanick
6f3b8bb747 util: Implement unreachable for MSVC using __assume
Based on the description of __assume at:

http://msdn.microsoft.com/en-us/library/1b3fsfxw.aspx

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-11-05 09:36:04 -08:00
Chris Forbes
1ca88aa582 i965: Fix sampler state pointer adjustment for nonconst samplers
This started hitting an assertion recently. Only affects Haswell
(Ivybridge doesn't support this meddling with the sampler state pointer,
and ARB_gpu_shader5 is not enabled yet on Broadwell)

14 Piglits crash->pass.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-05 23:32:42 +13:00
Nick Sarnie
9e2473763d ilo: add drm_configuration for the pipe-target
Allows the driver to advertise DMA-BUF and throttling.
2014-11-04 21:22:52 +00:00
Kenneth Graunke
6107557f8f i965: Re-enable Z16 on Gen8+.
Improves performance in GLBenchmark 2.7 TRex by 3.88889% +/- 0.336383%
(n=80) at 1280x720 on Broadwell GT3.  Together with the previous patch,
it improves performance by 5.42738% +/- 0.541971% (n=10) at 1920x1080.

Note that without the PMA stall fix, this would instead decrease
performance by 22%.

v2: Update comment (noticed by Kristian Høgsberg).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-04 11:39:18 -08:00
Kenneth Graunke
7423cc891b i965: Implement the PMA stall fix.
Certain non-promoted depth cases typically incur stalls.  In very
specific cases, we can enable a workaround which improves performance.

Improves performance in GLBenchmark 2.7 TRex by 1.17762% +/- 0.448765%
(n=75) at 1280x720 on Broadwell GT3.

Haswell has this feature as well, but we can't currently write registers
from userspace batches (and we'd incur additional software batch
scanning overhead as well), so we haven't enabled it.  Broadwell allows
us to write CACHE_MODE_1.  Backporters beware: the formula and flushing
incantation differs between Haswell and Broadwell.

v2: Move pma_stall_bits from brw->state to brw itself (requested by
    Kristian Høgsberg).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-04 11:38:01 -08:00
Kenneth Graunke
8ccf54ab09 i965: Add #defines for Broadwell HiZ workarounds in CACHE_MODE_1.
This patch adds macros needed for the HiZ PMA stall optimization.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-04 11:35:11 -08:00
Kenneth Graunke
b5ad8a5d72 i965: Update compaction code to handle Skylake like Cherryview.
Matt requested this in review feedback on the original patch, which I
completely missed when pushing this series.  Kristian also made this
change, but I grabbed the wrong version of the patch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-03 22:37:11 -08:00
Kenneth Graunke
8ca8dd123a mesa: Don't call _mesa_ClipControl from glPopAttrib when unsupported.
Otherwise, calling glPopAttrib on drivers that don't support
ARB_clip_control gives you a GL error, which is surprising at best.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-03 18:26:08 -08:00
Kenneth Graunke
f781965097 i965: Disable fast color clears on Skylake for now.
We're not programming the clear values yet, so this won't work.

This patch should be (effectively) reverted eventually.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-03 15:35:25 -08:00
Kristian Høgsberg
c31ce2c40c i965/skl: Use new MOCS for SKL
On Skylake, the MOCS bits are an index into a table of 63 different,
configurable cache configurations.  As for previous GENs, we only care about
WB and WT, which are available in the documented default set.  Define
SKL_MOCS_WB and SKL_MOCS_WT to the indices for those configucations and use
those for the Skylake MOCS values.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:33:12 -08:00
Jordan Justen
5745aaf15c i965/skl: Implement workaround for VF Invalidate issue
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:33:09 -08:00
Kenneth Graunke
35bbe177ec i965/skl: Update Viewport Z Clip Test Enable bits for Skylake.
Skylake has separate controls for enabling the Z Clip Test for the near
and far planes.  For now, maintain the legacy behavior by setting both.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:33:07 -08:00
Kenneth Graunke
77f584c7f9 i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.
Skylake's 3DSTATE_DS packet has a few more fields; we don't support
domain shaders yet though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:33:05 -08:00
Kristian Høgsberg
0bb072b42b i965/skl: Init instructions compaction tables for SKL
They are the same as for BDW, so just add a case for SKL to the init switch.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-03 15:32:59 -08:00
Kristian Høgsberg
d235c5afde i965/skl: Add fast clear resolve rect multipliers for SKL
SKL updates the resolve rectangle scaling factors again.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:55 -08:00
Kenneth Graunke
051bfe4d52 i965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.
On SKL, 3DSTATE_CONSTANT_* command is not committed until we give
the corresponding 3DSTATE_BINDING_TABLE_POINTERS_* command.  If we
fail to do so, the constant buffers wont be read and push constants
will be wrong.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:53 -08:00
Kenneth Graunke
1df496edb9 i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.
Otherwise they overlap and horrible things happen.  All the new DWords
are for fast color clear values, which we don't do yet.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:51 -08:00
Kenneth Graunke
d18949ad82 i965/skl: Refactor surface state allocation.
We will need to allocate more DWords on Skylake.

v2: Don't mark brw_context parameter const.  It's modified.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:49 -08:00
Kenneth Graunke
263b584d5e i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.
Skylake introduces a new base address for a feature we don't yet expose.
Setting these to 0 should be safe.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:47 -08:00
Kenneth Graunke
eaf12022d2 i965/skl: Update stencil reference handling for Skylake.
Skylake uploads the stencil reference values in DW3 of the
3DSTATE_WM_DEPTH_STENCIL packet, rather than in COLOR_CALC_STATE.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-03 15:32:45 -08:00