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Author SHA1 Message Date
Nicolai Hähnle
10cfd7a604 radeonsi: enable GLSL 4.20 and therefore OpenGL 4.2 
This is the last necessary bit for OpenGL 4.2 support. All driver-specific
functionality has already been implemented as part of extensions.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 20:13:49 -05:00
Iurie Salomov
047e3264f6 va: check null context in vlVaDestroyContext 
Signed-off-by: Iurie Salomov <iurcic@gmail.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
 2016-04-13 00:52:53 +01:00
Marek Olšák
8e70a58af3 radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added 
For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.
 2016-04-13 01:05:15 +02:00
Nicolai Hähnle
a191e6b719 radeonsi: fix bounds check in si_create_vertex_elements 
This was triggered by
dEQP-GLES3.functional.vertex_array_objects.all_attributes

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 16:32:46 -05:00
Nicolai Hähnle
bfd11c5996 radeonsi: enable shader buffer pipe caps 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:48 -05:00
Nicolai Hähnle
4e81843b13 radeonsi: add shader buffer support to TGSI_OPCODE_RESQ 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:45 -05:00
Nicolai Hähnle
01109282ce radeonsi: add shader buffer support to TGSI_OPCODE_STORE 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:43 -05:00
Nicolai Hähnle
745014c502 radeonsi: add shader buffer support to TGSI_OPCODE_LOAD 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:41 -05:00
Nicolai Hähnle
68bc25c931 radeonsi: add shader buffer support to TGSI_OPCODE_ATOM* 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:38 -05:00
Nicolai Hähnle
c6f5d000db radeonsi: add offset parameter to buffer_append_args 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:35 -05:00
Nicolai Hähnle
c565466eea radeonsi: adjust buffer_append_args to take a 128 bit resource 
Move the buffer resource extraction code out into its own function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:32 -05:00
Nicolai Hähnle
e88018ffe5 radeonsi: preload shader buffers in shaders 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:29 -05:00
Nicolai Hähnle
c495c0ad37 radeonsi: implement set_shader_buffers 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:26 -05:00
Nicolai Hähnle
73c8b85b64 radeonsi: move resetting of constant buffers into a separate function 
This will be re-used for shader buffers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:04 -05:00
Bas Nieuwenhuizen
126da23d70 radeonsi: Mark ARB_robust_buffer_access_behavior as supported. 
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 20:53:10 +02:00
Bas Nieuwenhuizen
70dcd841f7 gallium: Add capability for ARB_robust_buffer_access_behavior. 
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 20:53:06 +02:00
Tim Rowley
df37b06276 swr: [rasterizer core] warning cleanup 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
06c59dc417 swr: [rasterizer] Put in rudimentary garbage collection for the global arena allocator 
- Check for unused blocks every few frames or every 64K draws
- Delete data unused since the last check if total unused data is > 20MB

Doesn't seem to cause a perf degridation

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
b990483de2 swr: [rasterizer core] Put DRAW_CONTEXT on a diet 
No need for 256 pointers per DC.

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
a939a58881 swr: [rasterizer core] Add experimental support for hyper-threaded front-end 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
9a8146d0ff swr: [rasterizer] Avoid segv in thread creation on machines with non-consecutive NUMA topology. 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
2c71fd4bf8 swr: [rasterizer core] Replace all naked OSALIGN macro uses with OSALIGNSIMD / OSALIGNLINE 
Future proofing

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
32a8653ad2 swr: [rasterizer] Ensure correct alignment of stack variables used as vectors 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
e1871c4459 swr: [rasterizer core] Quantize depth to depth buffer precision prior to depth test/write. 
Fixes z-fighting issues.

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
2a19aca05f swr: [rasterizer common] win32 build fixups 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
c25244f2f7 swr: [rasterizer core] Affinitize thread scratch space to numa node of worker 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:04 -05:00
Tim Rowley
f89f6d562a swr: [rasterizer] Misc fixes identified by static code analysis 
No perf loss detected

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:04 -05:00
Jose Fonseca
b5105e67a8 gallium: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Jose Fonseca
b025c23cfe softpipe: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Jose Fonseca
2f13d7543f svga: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Marek Olšák
686b018ab3 r600g: use common scissor and viewport code 
It's the same as radeonsi. This adds guard band support to r600g.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:25 +02:00
Marek Olšák
87a5b07f90 gallium/radeon: add R600/Evergreen/Cayman support to common viewport code 
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:25 +02:00
Marek Olšák
2ca5566ed7 radeonsi: move scissor and viewport states into gallium/radeon 
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:24 +02:00
Marek Olšák
db00f6cc9c radeonsi: use guard band clipping 
Guard band clipping speeds up rasterization for primitives that are
partially off-screen.  This change in particular results in small
framerate improvements in a wide range of games.

Started by Grigori Goronzy <greg@chown.ath.cx>.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:12:14 +02:00
Marek Olšák
cb21f8a97c radeonsi: compute scissor from viewport in set_viewport_states 
and clamp it right before emitting. This is a prerequisite for computing
the guard band.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:49 +02:00
Marek Olšák
5b6a0b7fc0 gallium/radeon: set GTT WC on tiled textures 
Just for consistency. This should have no effect, because OpenGL textures
always go to VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
5a4b74d1ba gallium/radeon: relax requirements on VRAM placements on APUs 
This makes Tonga with vramlimit=128 2x faster in Heaven.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
a57309f807 winsys/amdgpu: remove hack for low VRAM configuration 
A better solution will be used.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
b36f19bf98 r600g: disable aniso filtering for non-mipmap textures on EG 
this is the default behavior of the closed driver when running on VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
3bc2d967c4 r600g: clean up aniso state translation 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
b0d4469519 radeonsi: disable aniso filtering for non-mipmap textures on SI-CI 
The closed driver does this, but it looks at base_level and last_level
and uses a conditional assignment, which LLVM can't generate on SGPRs.

That led me to invent this solution that abuses the image descriptor.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
ddd33431c5 radeonsi: clean up aniso state translation 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
f7420ef5b4 radeonsi: enable some sampler fields to match the closed driver 
copied from the Vulkan driver

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
1a98be001f gallium/radeon: fix maximum texture anisotropy setup 
We were overdoing it for non-power-of-two values.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
2d7be5d37e gallium/radeon: never choose a linear tiling for DB surfaces 
Just for consistency. This is actually not a problem, because both addrlib
and radeon check and fix this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
b7878146c4 gallium/radeon: removing dead code for sharing stencil buffers 
This is a remnant of the times when the DDX was allocating depth-stencil
buffers for windows. Now, st/dri allocates them and doesn't share them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
73aeebd772 radeonsi: allow clearing buffers >= 4 GB 
Only CMASK and DCC clears can use this, because only textures can be so
large.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
1dd8832e04 gallium/radeon: allow allocating textures >= 4 GB 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
0689741e51 winsys/radeon: fix printing allocation failures 
print as unsigned instead of signed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:47 +02:00
Marek Olšák
0ba0933f48 winsys/amdgpu: add support for 64-bit buffer sizes 
v2: fail in radeon_winsys_bo_create if size > 32 bits

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:47 +02:00