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radeonsi: add shader buffer support to TGSI_OPCODE_ATOM*
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
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parent
c6f5d000db
commit
68bc25c931
1 changed files with 47 additions and 16 deletions
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@ -2776,6 +2776,24 @@ static void membar_emit(
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emit_optimization_barrier(ctx);
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}
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static LLVMValueRef
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shader_buffer_fetch_rsrc(struct si_shader_context *ctx,
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const struct tgsi_full_src_register *reg)
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{
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LLVMValueRef ind_index;
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LLVMValueRef rsrc_ptr;
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if (!reg->Register.Indirect)
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return ctx->shader_buffers[reg->Register.Index];
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ind_index = get_bounded_indirect_index(ctx, ®->Indirect,
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reg->Register.Index,
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SI_NUM_SHADER_BUFFERS);
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rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_SHADER_BUFFERS);
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return build_indexed_load_const(ctx, rsrc_ptr, ind_index);
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}
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static bool tgsi_is_array_sampler(unsigned target)
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{
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return target == TGSI_TEXTURE_1D_ARRAY ||
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@ -3123,18 +3141,12 @@ static void atomic_fetch_args(
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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const struct tgsi_full_instruction * inst = emit_data->inst;
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unsigned target = inst->Memory.Texture;
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LLVMValueRef data1, data2;
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LLVMValueRef coords;
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LLVMValueRef rsrc;
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LLVMValueRef tmp;
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emit_data->dst_type = bld_base->base.elem_type;
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image_fetch_rsrc(bld_base, &inst->Src[0], target != TGSI_TEXTURE_BUFFER,
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&rsrc);
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coords = image_fetch_coords(bld_base, inst, 1);
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tmp = lp_build_emit_fetch(bld_base, inst, 2, 0);
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data1 = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type, "");
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@ -3150,15 +3162,34 @@ static void atomic_fetch_args(
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emit_data->args[emit_data->arg_count++] = data2;
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emit_data->args[emit_data->arg_count++] = data1;
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if (target == TGSI_TEXTURE_BUFFER) {
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rsrc = extract_rsrc_top_half(ctx, rsrc);
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buffer_append_args(ctx, emit_data, rsrc, coords,
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bld_base->uint_bld.zero, true);
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} else {
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emit_data->args[emit_data->arg_count++] = coords;
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emit_data->args[emit_data->arg_count++] = rsrc;
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if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
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LLVMValueRef offset;
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image_append_args(ctx, emit_data, target, true);
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rsrc = shader_buffer_fetch_rsrc(ctx, &inst->Src[0]);
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tmp = lp_build_emit_fetch(bld_base, inst, 1, 0);
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offset = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type, "");
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buffer_append_args(ctx, emit_data, rsrc, bld_base->uint_bld.zero,
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offset, true);
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} else {
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unsigned target = inst->Memory.Texture;
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LLVMValueRef coords;
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image_fetch_rsrc(bld_base, &inst->Src[0],
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target != TGSI_TEXTURE_BUFFER, &rsrc);
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coords = image_fetch_coords(bld_base, inst, 1);
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if (target == TGSI_TEXTURE_BUFFER) {
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rsrc = extract_rsrc_top_half(ctx, rsrc);
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buffer_append_args(ctx, emit_data, rsrc, coords,
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bld_base->uint_bld.zero, true);
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} else {
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emit_data->args[emit_data->arg_count++] = coords;
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emit_data->args[emit_data->arg_count++] = rsrc;
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image_append_args(ctx, emit_data, target, true);
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}
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}
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}
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@ -3170,11 +3201,11 @@ static void atomic_emit(
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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const struct tgsi_full_instruction * inst = emit_data->inst;
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unsigned target = inst->Memory.Texture;
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char intrinsic_name[40];
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LLVMValueRef tmp;
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if (target == TGSI_TEXTURE_BUFFER) {
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if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
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inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
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snprintf(intrinsic_name, sizeof(intrinsic_name),
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"llvm.amdgcn.buffer.atomic.%s", action->intr_name);
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} else {
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