Commit graph

5340 commits

Author SHA1 Message Date
Caio Oliveira
0669210ef4 intel/decoder: Add ELK support
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
0e582f0dfd intel/blorp: Add ELK support
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Sagar Ghuge
c3244135fa anv: Set timestampValidBits to 64bits
On Xe2+, timestamp register can hold value upto 64-bit.

This change also fixes the timestamp related tests on Xe2 platform.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27713>
2024-02-22 17:58:38 +00:00
Iván Briano
e3d4897dfe anv: flush query clears for all gens
Fixes: f733215c12 ("anv: enable query clear/copy using shaders on MTL/ARL")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27741>
2024-02-22 01:45:45 +00:00
Paulo Zanoni
2526308dcd anv/sparse: allow binding operations to match the resource size
The resource size doesn't need to match the binding granularity. For
example, if the user wants to create a 32kb buffer, Anv will require
its memory to have 64kb, but the buffer size will still be the
original 32kb. And the spec says:

  VUID-VkSparseMemoryBind-size-01100:
    "size must be less than or equal to the size of the resource minus
     resourceOffset"
  VUID-VkSparseMemoryBind-size-01102:
    "size must be less than or equal to the size of memory minus
     memoryOffset"

So when binding such buffer, size should actually be the lesser of the
two values: 32kb, and we have to accept that. Since our binding
granularity is 64kb, we're safe to simply extend the requested size to
match our binding granularity, since we already require the memory to
be appropriately sized.

None of this is exercised by dEQP. This was caught by
piglit/arb_sparse_buffer-basic using Zink.

Testcase: piglit/arb_sparse_buffer-basic
Issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10220
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26410>
2024-02-21 22:58:42 +00:00
Paulo Zanoni
a501a840a3 anv/sparse: add an extra step before anv_sparse_bind_resource_memory()
I need to add some sparse-related checks that require having the
anv_buffer and anv_image, and putting them directly inside
anv_queue_submit_sparse_bind_locked() doesn't feel like the right
thing to do. Here we change the interface so now we have
anv_sparse_bind_buffer() and anv_sparse_bind_image_opaque() as the
main interface into anv_sparse.c, so they both can call the lower
level anv_sparse_bind_resource_memory() function.

In the next patch we'll be adding changing the code of the functions
we just created, justifying their addition.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26410>
2024-02-21 22:58:42 +00:00
Karol Herbst
6474f8c2ce clc: include opencl-c.h for extensions needing it
This also allows tools build on clc to drop their workaround to include
it themselves. Rusticl might need it once it supports extensions which
need this file pulled in.

Later if the need to include it changes based on llvm version, we can
easily handle this in clc.

The main reason to include it only conditionally is the massively
reduction in compilation time. It also removes the mental burden from
users of clc to deal with any of this themselves.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10633
Fixes: 37a1346347 ("meson: remove opencl-external-clang-headers option and rely on shared-llvm")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27663>
2024-02-21 20:53:36 +00:00
José Roberto de Souza
1b61786ac7 intel: Move intel_define.h to i915/intel_define.h
This file defines i915 context priorities, all users in Iris and ANV
have moved to i915 specific files, so the only remaining for this file
is move it to i915 folder so it do not gets included in common code
by mistake.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27728>
2024-02-21 18:10:54 +00:00
Matt Turner
9f32e1a489 anv/drirc: Add option to control implicit sync on external BOs
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10546
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27704>
2024-02-21 17:19:26 +00:00
Lionel Landwerlin
137b7e874f anv: disable Wa_16013994831
We've implemented another workaround completely disabling high
priority preemption.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e6e320fc79 ("anv: make Wa_16013994831 to use intel_needs_workaround")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27716>
2024-02-21 11:39:50 +00:00
Caio Oliveira
8ae528331c intel/compiler: Use "intel" prefix for walk_order enum
Will be used later in non-brw specific code in Iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27646>
2024-02-21 00:38:35 +00:00
Caio Oliveira
078dbc4d33 anv: Remove lower_atomics from storage image lowering opts
The code only applies to Gfx <= 7.5, so it is a no-op.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27638>
2024-02-20 19:47:07 +00:00
Lionel Landwerlin
96ab1d65cc anv: fix emission of Wa_14015055625
When moving the static part, I missed that the
pipeline->primitive_id_override field isn't set yet when we check it
to emit 3DSTATE_TE.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1e081bd680 ("anv: split 3DSTATE_TE packing between static & dynamic parts")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27692>
2024-02-20 09:49:00 +00:00
Lionel Landwerlin
63676ed502 anv: fix Wa_16013994831 macros
The commit that switched to the WA framework forgot to update one of
the ifdef section.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e6e320fc79 ("anv: make Wa_16013994831 to use intel_needs_workaround")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27676>
2024-02-19 12:48:33 +00:00
Lionel Landwerlin
682c23aa06 anv: remove unused definition
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27504>
2024-02-19 11:10:29 +00:00
Lionel Landwerlin
27a7c5447d anv: reenable ANV_ALWAYS_BINDLESS
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27504>
2024-02-19 11:10:29 +00:00
Lionel Landwerlin
dbee85713f anv: factor out descriptor buffer flushing
Take the opportunity to fix the flush of the descriptor buffer surface
when needed. Previously we would only flush it if the shader used one
of the push descriptor.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27504>
2024-02-19 11:10:29 +00:00
Lionel Landwerlin
cf193af762 anv: fixup push descriptor shader analysis
There are a couple mistakes here :

   - using a bitfield as an index to generate a bitfield...

   - in anv_nir_push_desc_ubo_fully_promoted(), confusing binding
     table access of the descriptor buffer with actual descriptors

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27504>
2024-02-19 11:10:29 +00:00
Caio Oliveira
ae50ac46d1 intel: Remove brw_ prefix from process debug function
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27644>
2024-02-16 22:35:05 +00:00
Caio Oliveira
d8f9a05f32 intel/compiler: Rename the passes and files related to intel_nir.h
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27644>
2024-02-16 22:35:05 +00:00
Caio Oliveira
dc76cfc781 intel/compiler: Collect NIR-only passes in intel_nir.h
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27644>
2024-02-16 22:35:05 +00:00
Sagar Ghuge
24db040a49 anv: Drop warnings for engine initialization failure
We don't have to spit out warnings for the end users. For compute if we
fail to initialize, we are falling back to render for compute operation,

Anyway end-user applications can query what the engines/queues are
supported based on that they can choose to use a specific queue.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27660>
2024-02-16 20:48:17 +00:00
Caio Oliveira
805d45e916 intel/decoder: Move decoder to a separate module
Depends on both intel/common and intel/compiler.  Breaks circular
dependency between these two modules.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27647>
2024-02-16 16:37:31 +00:00
José Roberto de Souza
19439624d9 anv: Use DRM_XE_VM_BIND_OP_UNMAP_ALL to unbind whole bos
For non-sparse usage there is no difference between
DRM_XE_VM_BIND_OP_UNMAP_ALL and DRM_XE_VM_BIND_OP_UNMAP but for sparse
the same bo can be bound to more than one virtual address.

Then in a case like:
img = vkCreateImage()
mem = vkAllocateMemory()
vkQueueBindSparse(img, mem)
vkFreeMemory(mem)

Note that the sparse VMA bind still points to the closed bo(done in
vkFreeMemory()), but with DRM_XE_VM_BIND_OP_UNMAP_ALL all VMAs
over the bos are removed.

Access to a unbound VMA has a defined behavior(page fault) while
access to a bound VMA without backing gem/bo don't have defined
behavior.

Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27601>
2024-02-16 13:43:45 +00:00
Mark Janes
9b1ae760a8 anv: use intel_device_info to set device UUID
For anv, use the intel device info hash function instead of
device PCI ID when generating a UUID for the pipeline cache.

PCI ID can vary between on devices which are comparable from the
perspective of the shader compiler.  A more precise key eliminates
redundant entries in a multiplatform shader cache.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26844>
2024-02-15 16:58:20 -08:00
Caio Oliveira
5a88267366 intel: Add missing dependencies on blorp
Various components implicitly depend on blorp, make this explicit.

Checked by setting a 'compiler_args' on idep_intel_blorp and verifying
it on blorp_priv.h header.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27643>
2024-02-16 00:08:42 +00:00
Caio Oliveira
3b48b7df1f intel/blorp: Use a Meson dependency for blorp
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27643>
2024-02-16 00:08:42 +00:00
Lionel Landwerlin
f733215c12 anv: enable query clear/copy using shaders on MTL/ARL
It seems like an L3 setting is different between DG2 & MTL, breaking
the L3 coherency with CS.

We can apply the same tile cache flush as we do on TGL for now until
we figure out how to configure L3 properly to avoid this.

Tested with :

 $ query_clear_with_blorp_threshold=0 query_copy_with_shader_threshold=0 ./deqp-vk -n dEQP-VK.query_pool.*

to force the shader optimizations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27597>
2024-02-15 17:25:37 +00:00
Caio Oliveira
c8fda63378 intel/blorp: Don't require specific prog_data type in callback
Make interface less dependent on brw types.  If we care, later
might make sense to add a tagged union for the possible types here.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:18 +00:00
Caio Oliveira
5992185c8d intel/compiler: Merge intel_disasm.[ch] into corresponding brw files
Rename the functions to match the existing ones.

Acked-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27579>
2024-02-15 09:26:46 +00:00
Caio Oliveira
5732c9d269 intel/compiler: Rename brw_cs_dispatch_info to intel_cs_dispatch_info
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
c5b80de583 intel/compiler: Rename brw_vue_map to intel_vue_map
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
7d85d2c7fd intel/compiler: Rename DISPATCH_MODE_* enums to INTEL_DISPATCH_MODE_*
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
aeda865b6d intel/compiler: Rename BRW_TESS_* enums to INTEL_TESS_*
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
26dd1f0bba intel/compiler: Rename BRW_WM_MSAA_* enums to INTEL_MSAA_*
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
José Roberto de Souza
29ee85c203 anv: Use intel_engines_supported_count()
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233>
2024-02-14 17:29:54 +00:00
José Roberto de Souza
398bdb46ba anv: Drop include to common/i915/intel_gem.h
Common code should not directly include KMD specific files.
At least there was no usage from symbols defined in this file.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233>
2024-02-14 17:29:54 +00:00
Lionel Landwerlin
e54638ddf5 anv: fix buffer marker cache flush issues on MTL
For some yet unknown reason the CS L3 coherency setting is different
on MTL than DG2.

Fixes issues in tests from the subgroup :

  dEQP-VK.api.buffer_marker.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c8e122a738 ("anv: Implement rudimentary VK_AMD_buffer_marker support")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27613>
2024-02-14 13:45:46 +00:00
Lionel Landwerlin
34078b67ed anv: don't allocate aux padded BOs with host pointers
We can't allocate additional space with host pointers anyway. These
are already allocated pieces of memory by the application.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 646a7c864d ("anv: re-introduce BO CCS allocations")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10608
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27612>
2024-02-14 11:51:33 +00:00
Lionel Landwerlin
feb7cf82dc anv: remove redundant asserts
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27611>
2024-02-14 11:07:10 +00:00
Tapani Pälli
29a6beb36e anv: revert cache flushing changes for indirect commands
This reverts commit d699600da1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10600
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27591>
2024-02-13 09:47:32 +00:00
Lionel Landwerlin
b52e25d3a8 anv: rewrite internal shaders using OpenCL
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
2024-02-13 00:06:45 +00:00
Lionel Landwerlin
41b2ed65e2 genxml: generate opencl packing headers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
2024-02-13 00:06:45 +00:00
Lionel Landwerlin
c53a4711cb anv: fix incorrect flushing on shader query copy
When doing query result copies in 3D mode, we're flushing the render
target cache, but the shader writes go through the dataport.

Fixes flakes/fails in piglit with shader query copies forced with Zink :

  $ query_copy_with_shader_threshold=0 ./bin/arb_query_buffer_object-coherency -auto -fbo

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b3b12c2c27 ("anv: enable CmdCopyQueryPoolResults to use shader for copies")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
2024-02-13 00:06:44 +00:00
Lionel Landwerlin
c517088cf1 anv: factor out post submit queue debug code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
2024-02-13 00:06:44 +00:00
Lionel Landwerlin
646a7c864d anv: re-introduce BO CCS allocations
On Gfx12.0, CCS allocations have to be allocated per image because the
format of the image goes into the AUX-TT PTEs. The effect on memory
allocations is limited since the main surface granularity in the
AUX-TT PTE is 64KB.

On Gfx12.5, the granularity of the AUX-TT PTE is 1MB. This creates a
lot of waste in the application memory allocations. Fortunately the HW
doesn't care about the format put into the PTEs anymore. So it becomes
possible to have 2 images share the same PTE.

To implement this we bring back an earlier version of AUX-TT mappings
where we used to allocate additional CCS space at the end of the
VkDeviceMemory objects. On Gfx12.5, if the BO has additional CCS
space, we will now map the main surface to that space.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26822>
2024-02-12 21:00:27 +00:00
Lionel Landwerlin
da6484a8a4 anv: use address helper to compute address u64 value
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26822>
2024-02-12 21:00:27 +00:00
Lionel Landwerlin
7763e75eea anv: move ALLOC_HOST_CACHED_COHERENT as define
That way gdb can decode the other flags when looking at the variables.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26822>
2024-02-12 21:00:27 +00:00
Sviatoslav Peleshko
28ad2f488a anv: Store host-located copy of NULL surface state for faster memcpy
Real null_surface_state is located in the GPU memory, so copying from
there will be slow for dGPUs.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10594
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27577>
2024-02-12 17:48:15 +00:00
Lionel Landwerlin
e0b4dfbbda anv: don't unmap AUX ranges at BO delete
It is possible to free memory backing images before images are
destroyed :

   VkFreeMemory:

   "Memory can be freed whilst still bound to resources, but those
    resources must not be used afterwards."

The spec leaves us the option to keep a reference on the associated
memory and free it only when all the bound resources have been
destroyed. Here we choose to free memory immediately.

One particular test in the CTS
(dEQP-VK.synchronization.internally_synchronized_objects.pipeline_cache_graphics)
does the following :

   imgA = vkCreateImage()
   imgB = vkCreateImage()
   memA = vkAllocateMemory()
   vkBindImageMemory(imgA, memA) # Aux mapping with ref count = 1
   vkFreeMemory(memA)            # Aux mapping removed, ref count = 0
   memB = vkAllocateMemory()     # Same address as memA
   vkBindImageMemory(imgB, memB)
   vkDestroyImage(imgA)	         # Removes the mapping of imgB-memB

   vkQueueSubmit()               # hang with pagefault in AUX-TT

The solution implemented in this change is to not do anything AUX-TT
related in vkFreeMemory(). This soluation has some consequences,
because a virtual memory address range freed and reallocated cannot be
rebound in the AUX-TT until all the associated resources have released
their AUX-TT mapping (to bring back the AUX-TT refcount of the range
to 0). This should still be better than keeping the memory allocated
through refcounting of the anv_bo.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7b87e1afbc ("anv: track & unbind image aux-tt binding")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10528
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27566>
2024-02-12 15:37:18 +00:00