Commit graph

485 commits

Author SHA1 Message Date
Dave Airlie
fe6c407a33 radv: handle fragment shader srgb resolve pass better
Bas pointed out the fs key doesn't take srgb into account,
since there is just one srgb variant, just create a separate
pipeline for it. This also uses dest format to be more consistent
on when srgb matters.

Fixes: 69136f4e63 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-11 10:36:06 +10:00
Grazvydas Ignotas
45ccb661d8 radv: always free nir shaders from modules on stack
valgrind reports them as leaked, and I could not find anything making a
copy of the nir pointer. Also, radv_device_init_meta_blit_color() is
already freeing them unconditionally like this.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-05-10 01:13:44 +03:00
Jason Ekstrand
b86dba8a0e nir: Embed the shader_info in the nir_shader again
Commit e1af20f18a changed the shader_info
from being embedded into being just a pointer.  The idea was that
sharing the shader_info between NIR and GLSL would be easier if it were
a pointer pointing to the same shader_info struct.  This, however, has
caused a few problems:

 1) There are many things which generate NIR without GLSL.  This means
    we have to support both NIR shaders which come from GLSL and ones
    that don't and need to have an info elsewhere.

 2) The solution to (1) raises all sorts of ownership issues which have
    to be resolved with ralloc_parent checks.

 3) Ever since 00620782c9, we've been
    using nir_gather_info to fill out the final shader_info.  Thanks to
    cloning and the above ownership issues, the nir_shader::info may not
    point back to the gl_shader anymore and so we have to do a copy of
    the shader_info from NIR back to GLSL anyway.

All of these issues go away if we just embed the shader_info in the
nir_shader.  There's a little downside of having to copy it back after
calling nir_gather_info but, as explained above, we have to do that
anyway.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:07:47 -07:00
Dave Airlie
d71ca40a18 radv: fix regression in blit2d push constant change.
These were being fed to the shader as floats via the vertex
path, so also push them as floats here.

This fixes missing overlay in Sascha Willems demos.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 00:54:49 +01:00
Dave Airlie
bcf705b62e radv/meta: cleanup some unused code path
After moving everything to using push constants,
these paths are no longer needed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:55 +10:00
Dave Airlie
387fdf84c5 radv/meta: port blit to using push constants
Remove use of vertex buffer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:52 +10:00
Dave Airlie
7c8bfb95c6 radv/meta: move blit2d to using push constants
This allows us to drop the vertex buffer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:49 +10:00
Dave Airlie
b29ea49e8e radv/meta: move clear color to using push constants
The color clear value is uniform and needs only to be emitted from
the frag shader, so just push it down via a push constant,
and remove the vertex buffer completely.

The depth clear value needs to be emitted from the vertex
shader, but is only a single value.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:45 +10:00
Dave Airlie
3b85b630ee radv/meta: use novertex save path for resolve pass.
This was missing in the original change.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:42 +10:00
Dave Airlie
eb2a833679 radv: set base/ranges for push constant loads.
This isn't necessary yet but I'd like to use the range in
some future patches.

[airlied: add new resolve pass]
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-08 08:56:36 +10:00
Dave Airlie
823e9ea8a1 radv: drop resolve hack workarounds
This drops the resolve workarounds that change an image
tiling mode behinds it's back, this is horrible and breaks
the image_view->image relationship. Remove all this.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:39 +01:00
Dave Airlie
2a04f5481d radv/meta: select resolve paths
There are 3 resolve paths, the fastest being the hw resolver
but it has restriction on tile modes and can't do subresolves,
the compute resolver is next speed wise, but can't handle DCC
destinations, the fragment resolver handles that case.

This will end up with a slow down as currently we hack the
hw resolver paths when they shouldn't work, but we shouldn't
keep doing that.

The next patch removes the hacks.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:39 +01:00
Dave Airlie
69136f4e63 radv/meta: add resolve pass using fragment/vertex shaders
In order to resolve into DCC enabled dests we need to use
the fragment shader. This reuses the code from the compute
path and implements a resolve path in vertex/fragment shader.

This code isn't used until later.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:39 +01:00
Dave Airlie
19be95f71e radv: add subpass resolve compute path
This adds a path to allow compute resolves to be used
for subpass resolves.

This isn't used yet, but will be later.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:39 +01:00
Dave Airlie
c573076d4a radv/resolve: split resolve emission out for compute
This will allow to add a subpass compute resolve path.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:38 +01:00
Dave Airlie
ff47866107 radv/meta: split out core part of resolve shader
I want to reuse the same code for the fragment shader
version of the resolve shaders.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:38 +01:00
Dave Airlie
588185eb6b radv/meta: add srgb conversion to end of resolve shader.
If we are resolving into an srgb dest, we need to convert
to linear so the store does the conversion back.

This should fix some wierdness seen when we subresolves
hit the compute path.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 23:41:38 +01:00
Dave Airlie
c297e68828 radv: set PERF_MOD in sample state like radeonsi.
This just aligns the code with radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 11:19:01 +01:00
Dave Airlie
2add79a732 radv: apply the tess+GS hang workaround to Polaris12 as well
As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-07 11:17:48 +01:00
Fredrik Höglund
5ff4858111 radv/meta: fix restoring a push descriptor set
radv_bind_descriptor_set cannot be used to bind a push descriptor set
since a push descriptor set does not have a buffer list. However,
there is no need to add the buffers again when restoring a set, so
this fix is also an optimization.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-05-06 01:46:18 +02:00
Dave Airlie
a096d8d3f7 radv: enable POLARIS12 support.
This just adds the chip in the right places.

We don't set the partial_vs_wave workaround, as radeonsi
doesn't, but have to confirm it's not required.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-05 11:07:40 +10:00
Dave Airlie
efa19f5a54 radv: don't advertise transfer props unless we can do anything else
There is no reason to advertise transfer ability for formats we can't
use for anything else. This stops some CTS tests hitting internal
error for 64-bit types when they see the transfer flags.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-05 05:46:02 +10:00
Bas Nieuwenhuizen
33ad6226a0 radv: Don't use FLAT_SHADE for constants.
Setting both offset to 0x20 and flat shade results in passthrough
mode instead of the constant.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: f205e19e4f "radv/ac: eliminate unused vertex shader outputs. (v2)"
2017-05-04 10:38:14 +10:00
Grazvydas Ignotas
8aab792e92 radv: don't leak DRM devices
After successful drmGetDevices2() call, drmFreeDevices() needs to be called.

Fixes: 743315f2 "radv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-05-03 22:04:52 +03:00
Grazvydas Ignotas
898cbb491b radv: fix possible stack corruption
drmGetDevices2 takes count and not size. Probably hasn't caused problems
yet in practice and was missed as setups with more than 8 DRM devices
are not very common.

Fixes: 743315f2 "radv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-05-03 22:02:45 +03:00
Bas Nieuwenhuizen
eeff7e1154 radv: Add userspace fence buffer per context.
Having it in the winsys didn't work when multiple devices use
the same winsys, as we then have multiple contexts per queue,
and each context counts separately.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: 7b9963a28f "radv: Enable userspace fence checking."
2017-05-03 03:10:12 +02:00
Dave Airlie
2a2a21450b radv: enable lower_sub to fix loop unrolling.
Loop unroll asserts if it hits a sub, we don't really want
to lower subs as llvm handles these things, but do this for
now, until we can fix loop unroll to work with subs.

Fixes: 14ae0bfa5 (radv: Add NIR loop unrolling)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 09:03:43 +10:00
Bas Nieuwenhuizen
9e847eedd5 radv: Don't set dynamic state for pipelines with rasterizer dicard.
All of the dynamic states apply to rasterization & fragment processing,
so we don't need to set them if we don't rasterize.

We don't clear the dirty flags for them though, so we don't miss any
updates for the next pipeline with rasterization.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: 76603aa90b "radv: Drop the default viewport when 0 viewports are given."
2017-05-03 00:12:56 +02:00
Dave Airlie
a524704025 radv: flush more stages when semaphore are waiting.
This still doesn't give us complete pWaitDstStageMask support,
but it should provide enough to be correct if not as efficent as
possible.

If we have wait semaphores we must flush between submits and
flush the shaders as well.

This fixes the remaining fails in:
dEQP-VK.synchronization.op.single_queue.semaphore.*ssbo*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 07:21:31 +10:00
Dave Airlie
3c73063974 radv: fix stencil only clears.
If we are clearing stencil only, we still need to provide a
a valid Z output from the vertex shader, we can't rely
on the depth clear value having any meaning, as we use this
for the position output, and it could get clipped, so we
don't end up clearing anything.

Fixes:
dEQP-VK.renderpass.simple.stencil
since I added S8 support.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:31:20 +10:00
Dave Airlie
09034aab64 radv/wsi: report presentation error per image request
This ports
0fcb92c17d
anv: wsi: report presentation error per image request

This fixes:
dEQP-VK.wsi.xlib.incremental_present.scale_none.*

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:11:19 +10:00
Dave Airlie
ce0f692528 radv: minor pahole related improvements.
This just reduces the structs by 4-8 bytes each.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:03:07 +10:00
Dave Airlie
9399870ef0 radv/image: resize some surface members.
Oops meant to be part of previous series.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:03:02 +10:00
Dave Airlie
fe6d9c0825 radv: drop unused surface level members.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:00:42 +10:00
Dave Airlie
5d0f792f06 radv/image: drop blk_d
This was pretty much unused.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:00:38 +10:00
Dave Airlie
052487be4c radv: remove some members of radeon surface.
We would be storing this info twice per image, no need to,
remove it from the surface struct.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:00:35 +10:00
Dave Airlie
7e8d0a402b radv: move some image info into a separate struct.
This is to rework the surface code like radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 06:00:17 +10:00
Dave Airlie
d5400a5ec2 radv: provide a helper for comparing an image extents.
This just makes it easier to do the follow in cleanups of the surface.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-03 05:59:52 +10:00
Bas Nieuwenhuizen
6681ab1f97 radv: Use correct stage for ready bit.
Set the bit in the same stage as the timestamp, instead always at top of pipe.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
2017-05-02 00:54:44 +02:00
Bas Nieuwenhuizen
568aec29d9 radv: Add top of pipe timestamp queries.
Does not fix brokenness with the ready bit.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-02 00:54:18 +02:00
Bas Nieuwenhuizen
14ae0bfa54 radv: Add NIR loop unrolling.
Not much effect on dota2/talos, but positive on deferred.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Timothy Arceri <timothy.arceri@itsqueeze.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-02 00:09:42 +02:00
Dave Airlie
f205e19e4f radv/ac: eliminate unused vertex shader outputs. (v2)
This is ported from radeonsi, and I can see at least one
Talos shader drops an export due to this, and saves some
VGPR usage.

v2: use shared code.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-27 05:18:52 +01:00
Dave Airlie
9da1045933 radv: fix regression in descriptor set freeing.
Since the host pool changes,

Fixes:
dEQP-VK.api.descriptor_pool.out_of_pool_memory

Fixes: 126d5ad "radv: Use host memory pool for non-freeable descriptors."
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-27 10:50:46 +10:00
Bas Nieuwenhuizen
7b9963a28f radv: Enable userspace fence checking.
v2: - Added some error handling.
    - memset the buffer to 0.

v3: Added assert for buffer size.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-04-26 01:32:41 +02:00
Dave Airlie
b2cedb3ea9 radv/ac: overhaul vs output/ps input routing
In order to cleanly eliminate exports rewrite the
code first to mirror how radeonsi works for now.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-25 23:24:39 +01:00
Dave Airlie
b858cb4df8 radv/ac: move point coord after layer/viewport.
These need to be ordered as per shader enum ordering, I'll
rewrite this soon, but this is a bug fix.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-25 23:24:21 +01:00
Bas Nieuwenhuizen
18947fde7a radv: Enable lowering fdiv in nir.
Results in faster code than the lowering by LLVM.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-04-23 20:38:06 +02:00
Bas Nieuwenhuizen
e137b9eed9 radv: Use the correct pipeline for dispatches.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: ec15e0d30 "radv: optimise compute shader grid size emission."
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-22 20:26:59 +01:00
Bas Nieuwenhuizen
0e91d8f38c radv: Prefetch compute shader too.
For consistency, doesn't really impact performance.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-04-21 00:59:02 +02:00
Bas Nieuwenhuizen
6bb1ed6bcc radv: Set variant code_size when created from the cache.
Signed-off-by: Bas Nieeuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-04-20 01:01:49 +02:00