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Author SHA1 Message Date
Lionel Landwerlin
75c6ad9907 intel/fs: fixup sampler header message 
If you look at the sampler message header on Gfx9+, you'll see that we
mostly only use 2 dwords (dw2 & dw3). DW2 has a bunch of sampler
parameters, DW3 is the sampler handle.

On Gfx9 we can micro optimize by copying r0 into the header because
the HW mostly doesn't care about other DWs. We just have to clear dw2
on non VS/FS stages.

On Gfx11+, we always have to do a careful copy of the r0.3 bits to
mask out the bottom unrelated bits. So there, just clearing the entire
header makes more sense.

On Xe2+, the dw4 of the header references the sampler feedback surface
handle and bit0 is a boolean to know whether to use that surface or
not. So it *REALLY* matters to have that as 0. If we copy r0, we'll
get random bits in dw4, leading to enable that surface.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28082>
 2024-03-12 07:25:45 +00:00
Caio Oliveira
e1afffe7fa intel/brw: Use hstride instead of stride for accumulator 
The `stride` field is not meant to be used by ARFs (like the
accumulator), and is always 1.  Use the `hstride` instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28064>
 2024-03-09 18:26:24 +00:00
Caio Oliveira
7a038cc097 intel/elk: Clean up unused code in elk_compiler.h 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:19 +00:00
Caio Oliveira
be73fa1434 intel/elk: Remove multi-polygon support 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:19 +00:00
Caio Oliveira
fd3a815a5b intel/elk: Remove remaining Gfx9+ code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:19 +00:00
Caio Oliveira
ea12b38602 intel/elk: Remove uses of intel_device_info_is_9lp() 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
9f5213923e intel/elk: Remove Gfx9+-only passes 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
fb2eee2aaa intel/elk: Remove use_tcs_multi_patch 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
abbb7d64f5 intel/elk: Remove Gfx9+ from NIR auxiliary code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
64ff9fa5ae intel/elk: Remove Gfx9+ from disasm 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
566e3c675e intel/elk: Remove Gfx9+ from asm grammar 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
936528cda5 intel/elk: Remove Gfx9+ from Reg related code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
f170d8395b intel/elk: Remove Gfx9+ from FS generator 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
3d867e2fc7 intel/elk: Remove coarse pixel handling 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
7bce435dca intel/elk: Remove Gfx9+ from EU emission 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
d9e7682ccc intel/elk: Remove Gfx9+ from thread payload 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
241a03b8ec intel/elk: Remove Gfx9+ from passes 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
2b6b786feb intel/elk: Remove FB_WRITE_LOGICAL_SRC_SRC_STENCIL 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
7b651ac6c3 intel/elk: Remove Gfx9+ from compile/run functions 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
cb2d96af6a intel/elk: Remove Gfx9+ from nir conversion 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
6b6de68b1c intel/elk: Remove validation code for Gfx9+ 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
9f80fc3d70 intel/elk: Remove unused SEND features 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
2b15a90cc3 intel/elk: Remove unused sources from ELK_SHADER_OPCODE_SEND 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
e44bacfa91 intel/elk: Remove Xe2 logical sends lowering 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
ff64e68ef4 intel/elk: Remove ex_desc and ex_mlen from elk_inst 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
75e13ac705 intel/elk: Remove Gfx12.5 URB message 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
a3f67c2d3a intel/elk: Remove FB_READ opcodes 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
77ba6f5dcd intel/elk: Remove Gfx9+ dataport messages 
Note GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ is marked as Gfx9 but
it is in the bspec and the PRM does mention it (although not in the
list), so keep it around since we've been using it for a while now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
59c5c67d22 intel/elk: Rename symbols for A64 OWord Block R/W messages 
These are also present in Gfx8, so use the GFX8 instead of
GFX9 as prefix to avoid confusion.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
05d78994a7 intel/elk: Remove Gfx9+ sampler messages and modes 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
9b709e31cb intel/elk: Remove Gfx12 SFIDs and related LSC code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
43b2261ab5 intel/elk: Remove SYNC opcode and SWSB annotations 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
37cd18e30e intel/elk: Remove encoding for Gfx9+ 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
accac95c0d intel/elk: Remove EU compaction logic for Gfx9+ 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:18 +00:00
Caio Oliveira
e8c4104362 intel/elk: Remove IADD3 opcode 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Caio Oliveira
d1049408b5 intel/elk: Remove ROR and ROL opcodes 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Caio Oliveira
28a7265b10 intel/elk: Remove DP4A opcode 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Caio Oliveira
9e58170f84 intel/elk: Remove BTD and RT opcodes 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Caio Oliveira
24569b8079 intel/elk: Remove DPAS opcode 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Caio Oliveira
7b90470ca1 intel/elk: Remove split sends 
They are not supported in Gfx8-.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
 2024-03-07 15:53:17 +00:00
Kenneth Graunke
edf14f4b7c intel/brw: Unindent code after previous change 
I kept things indented in the previous patch to make the diffs easier to
read, but there's no reason to continue doing so.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27959>
 2024-03-05 12:03:31 +00:00
Kenneth Graunke
4c10613625 intel/brw: Remove SIMD lowering to a larger SIMD size 
On Gfx4, we had to emulate SIMD8 texturing with SIMD16 for some message
types.  This ceased to be a thing with Gfx5 and hasn't come up again.

So, we can simply assert that we are truly "SIMD splitting", and assume
that the lowered size is smaller than the original instruction size.
This avoids some mental complexity as we can always think of the split
instructions as taking apart, operating on, and recombining subsets of
the original values.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27959>
 2024-03-05 12:03:31 +00:00
Kenneth Graunke
bb191e3af5 intel/brw: Call constant combining after copy propagation/algebraic 
This copy propagation can create MADs with immediates in src1, which
need to be cleaned up by constant combining (which puts them back in
VGRFs).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
e8ef184677 intel/brw: Make register coalescing obey the g112-g127 restriction 
opt_register_coalesce can sometimes unpleasantly coalesce both
SENDS payload sources into the larger of the two registers.
This can break the assumption that the VGRFs for sources 2-3
must occupy no more than 16 registers, so they fit in g112-127.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
1c1e79d75a intel/brw: Copy the smaller payload in fixup_sends_duplicate_payload 
Sometimes one source can be a larger register than the other, especially
since opt_register_coalesce can sometimes coalesce those sources into
larger registers.

Copy the smaller of mlen and ex_mlen.  It's less copying.

shader-db and fossil-db on Alchemist show 47 shaders affected with
small 1-2 instruction improvements each, and no regressions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
91252c98a8 intel/brw: Add assertions that EOT messages live in g112+ 
The validator already catches this, but asserting here makes it easier
to catch the problem earlier in a debugger.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
f6ac6c94a9 intel/brw: Handle SHADER_OPCODE_SEND without src[3] in copy prop 
We construct some SENDs with only 3 sources (such as FB writes).
This code could read out of bounds.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
49606ab067 intel/brw: Avoid copy propagating any fixed registers into EOTs 
We were handling FIXED_GRF, but we probably also ought to handle ATTR
(pushed inputs) and UNIFORM (pushed constants).  Just check if file
isn't VGRF to handle everything.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke
97bf3d3b2d intel/brw: Replace CS_OPCODE_CS_TERMINATE with SHADER_OPCODE_SEND 
There's no need for special handling here, it's just a send message
with a trivial g0 header and descriptor.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27924>
 2024-03-05 11:16:20 +00:00
Kenneth Graunke
63d2aa4eb6 intel/brw: Mark FIND[_LAST]_LIVE_CHANNEL as not writing the flag 
brw_lower_find_live_channel doesn't actually write a flag register,
but elk_find_live_channel notes that the flag was used on Gfx7.

This allows more CSE on FIND[_LAST]_LIVE_CHANNEL.

shader-db and fossil-db on Alchemist show minor reductions in cycles
and instruction count, a few minor increases, but it doesn't seem to
be a large effect in either direction.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27862>
 2024-03-01 17:18:30 -08:00