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intel/elk: Remove DP4A opcode

Browse source 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
This commit is contained in:
Caio Oliveira 2024-02-09 21:49:36 -08:00 • committed by Marge Bot
parent 9e58170f84
commit 28a7265b10
14 changed files with 1 additions and 78 deletions
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7
src/intel/compiler/elk/elk_compiler.c
View file

@ -123,13 +123,6 @@ elk_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
nir_options->lower_ifind_msb = devinfo->ver < 7;
nir_options->has_iadd3 = devinfo->verx10 >= 125;
nir_options->has_sdot_4x8 = devinfo->ver >= 12;
nir_options->has_udot_4x8 = devinfo->ver >= 12;
nir_options->has_sudot_4x8 = devinfo->ver >= 12;
nir_options->has_sdot_4x8_sat = devinfo->ver >= 12;
nir_options->has_udot_4x8_sat = devinfo->ver >= 12;
nir_options->has_sudot_4x8_sat = devinfo->ver >= 12;
nir_options->lower_int64_options = int64_options;
nir_options->lower_doubles_options = fp64_options;

1
src/intel/compiler/elk/elk_eu.c
View file

@ -742,7 +742,6 @@ static const struct elk_opcode_desc opcode_descs[] = {
{ ELK_OPCODE_DPH, 85, "dph", 2, 1, GFX_LT(GFX11) },
{ ELK_OPCODE_DP3, 86, "dp3", 2, 1, GFX_LT(GFX11) },
{ ELK_OPCODE_DP2, 87, "dp2", 2, 1, GFX_LT(GFX11) },
{ ELK_OPCODE_DP4A, 88, "dp4a", 3, 1, GFX_GE(GFX12) },
{ ELK_OPCODE_LINE, 89, "line", 2, 1, GFX_LE(GFX10) },
{ ELK_OPCODE_PLN, 90, "pln", 2, 1, GFX_GE(GFX45) & GFX_LE(GFX10) },
{ ELK_OPCODE_MAD, 91, "mad", 3, 1, GFX_GE(GFX6) },

1
src/intel/compiler/elk/elk_eu.h
View file

@ -256,7 +256,6 @@ ALU2(DP4)
ALU2(DPH)
ALU2(DP3)
ALU2(DP2)
ALU3(DP4A)
ALU2(LINE)
ALU2(PLN)
ALU3(MAD)

1
src/intel/compiler/elk/elk_eu_emit.c
View file

@ -1067,7 +1067,6 @@ ALU2(DP4)
ALU2(DPH)
ALU2(DP3)
ALU2(DP2)
ALU3(DP4A)
ALU3(MAD)
ALU3F(LRP)
ALU1(BFREV)

1
src/intel/compiler/elk/elk_eu_opcodes.h
View file

@ -86,7 +86,6 @@ enum elk_opcode {
ELK_OPCODE_DPH,
ELK_OPCODE_DP3,
ELK_OPCODE_DP2,
ELK_OPCODE_DP4A, /**< Gfx12+ */
ELK_OPCODE_LINE,
ELK_OPCODE_PLN, /**< G45+ */
ELK_OPCODE_MAD, /**< Gfx6+ */

12
src/intel/compiler/elk/elk_eu_validate.c
View file

@ -2221,18 +2221,6 @@ instruction_restrictions(const struct elk_isa_info *isa,
}
}
if (elk_inst_opcode(isa, inst) == ELK_OPCODE_DP4A) {
/* Page 396 (page 412 of the PDF) of the DG1 PRM volume 2a says:
*
* Only one of src0 or src1 operand may be an the (sic) accumulator
* register (acc#).
*/
ERROR_IF(src0_is_acc(devinfo, inst) && src1_is_acc(devinfo, inst),
"Only one of src0 or src1 operand may be an accumulator "
"register (acc#).");
}
if (elk_inst_opcode(isa, inst) == ELK_OPCODE_ADD3) {
const enum elk_reg_type dst_type = inst_dst_type(isa, inst);

1
src/intel/compiler/elk/elk_fs.cpp
View file

@ -4693,7 +4693,6 @@ get_lowered_simd_width(const elk_fs_visitor *shader, const elk_fs_inst *inst)
const struct intel_device_info *devinfo = compiler->devinfo;
switch (inst->opcode) {
case ELK_OPCODE_DP4A:
case ELK_OPCODE_MOV:
case ELK_OPCODE_SEL:
case ELK_OPCODE_NOT:

1
src/intel/compiler/elk/elk_fs_builder.h
View file

@ -635,7 +635,6 @@ namespace elk {
ALU1(FBH)
ALU1(FBL)
ALU1(FRC)
ALU3(DP4A)
ALU2(LINE)
ALU1(LZD)
ALU2(MAC)

5
src/intel/compiler/elk/elk_fs_generator.cpp
View file

@ -1798,11 +1798,6 @@ elk_fs_generator::generate_code(const elk_cfg_t *cfg, int dispatch_width,
elk_MACH(p, dst, src[0], src[1]);
break;
case ELK_OPCODE_DP4A:
assert(devinfo->ver >= 12);
elk_DP4A(p, dst, src[0], src[1], src[2]);
break;
case ELK_OPCODE_LINE:
elk_LINE(p, dst, src[0], src[1]);
break;

33
src/intel/compiler/elk/elk_fs_nir.cpp
View file

@ -1859,39 +1859,6 @@ fs_nir_emit_alu(nir_to_elk_state &ntb, nir_alu_instr *instr,
bld.emit(ELK_FS_OPCODE_PACK_HALF_2x16_SPLIT, result, op[0], op[1]);
break;
case nir_op_sdot_4x8_iadd:
case nir_op_sdot_4x8_iadd_sat:
inst = bld.DP4A(retype(result, ELK_REGISTER_TYPE_D),
retype(op[2], ELK_REGISTER_TYPE_D),
retype(op[0], ELK_REGISTER_TYPE_D),
retype(op[1], ELK_REGISTER_TYPE_D));
if (instr->op == nir_op_sdot_4x8_iadd_sat)
inst->saturate = true;
break;
case nir_op_udot_4x8_uadd:
case nir_op_udot_4x8_uadd_sat:
inst = bld.DP4A(retype(result, ELK_REGISTER_TYPE_UD),
retype(op[2], ELK_REGISTER_TYPE_UD),
retype(op[0], ELK_REGISTER_TYPE_UD),
retype(op[1], ELK_REGISTER_TYPE_UD));
if (instr->op == nir_op_udot_4x8_uadd_sat)
inst->saturate = true;
break;
case nir_op_sudot_4x8_iadd:
case nir_op_sudot_4x8_iadd_sat:
inst = bld.DP4A(retype(result, ELK_REGISTER_TYPE_D),
retype(op[2], ELK_REGISTER_TYPE_D),
retype(op[0], ELK_REGISTER_TYPE_D),
retype(op[1], ELK_REGISTER_TYPE_UD));
if (instr->op == nir_op_sudot_4x8_iadd_sat)
inst->saturate = true;
break;
case nir_op_ffma:
if (nir_has_any_rounding_mode_enabled(execution_mode)) {
elk_rnd_mode rnd =

6
src/intel/compiler/elk/elk_gram.y
View file

@ -279,9 +279,6 @@ i965_asm_ternary_instruction(int opcode,
case ELK_OPCODE_BFI2:
elk_BFI2(p, dest, src0, src1, src2);
break;
case ELK_OPCODE_DP4A:
elk_DP4A(p, dest, src0, src1, src2);
break;
case ELK_OPCODE_ADD3:
elk_ADD3(p, dest, src0, src1, src2);
break;
@ -400,7 +397,7 @@ add_label(struct elk_codegen *p, const char* label_name, enum instr_label_type t
%token <integer> ADD ADD3 ADDC AND ASR AVG
%token <integer> BFE BFI1 BFI2 BFB BFREV BRC BRD BREAK
%token <integer> CALL CALLA CASE CBIT CMP CMPN CONT CSEL
%token <integer> DIM DO DP2 DP3 DP4 DP4A DPH
%token <integer> DIM DO DP2 DP3 DP4 DPH
%token <integer> ELSE ENDIF F16TO32 F32TO16 FBH FBL FORK FRC
%token <integer> GOTO
%token <integer> HALT
@ -962,7 +959,6 @@ ternaryopcodes:
| BFI2
| LRP
| MAD
| DP4A
| ADD3
;

7
src/intel/compiler/elk/elk_ir_performance.cpp
View file

@ -498,13 +498,6 @@ namespace {
return calculate_desc(info, EU_UNIT_FPU, 0, 2, 0, 0, 2,
0, 12, 8 /* XXX */, 18 /* XXX */, 0, 0);
case ELK_OPCODE_DP4A:
if (devinfo->ver >= 12)
return calculate_desc(info, EU_UNIT_FPU, 0, 2, 1, 0, 2,
0, 10, 6 /* XXX */, 14 /* XXX */, 0, 0);
else
abort();
case ELK_SHADER_OPCODE_RCP:
case ELK_SHADER_OPCODE_RSQ:
case ELK_SHADER_OPCODE_SQRT:

1
src/intel/compiler/elk/elk_lex.l
View file

@ -77,7 +77,6 @@ do { yylval.integer = ELK_OPCODE_DO; return DO; }
dp2 { yylval.integer = ELK_OPCODE_DP2; return DP2; }
dp3 { yylval.integer = ELK_OPCODE_DP3; return DP3; }
dp4 { yylval.integer = ELK_OPCODE_DP4; return DP4; }
dp4a { yylval.integer = ELK_OPCODE_DP4A; return DP4A; }
dph { yylval.integer = ELK_OPCODE_DPH; return DPH; }
else { yylval.integer = ELK_OPCODE_ELSE; return ELSE; }
endif { yylval.integer = ELK_OPCODE_ENDIF; return ENDIF; }

2
src/intel/compiler/elk/elk_shader.cpp
View file

@ -929,7 +929,6 @@ elk_backend_instruction::can_do_source_mods() const
case ELK_OPCODE_ROL:
case ELK_OPCODE_ROR:
case ELK_OPCODE_SUBB:
case ELK_OPCODE_DP4A:
case ELK_SHADER_OPCODE_BROADCAST:
case ELK_SHADER_OPCODE_CLUSTER_BROADCAST:
case ELK_SHADER_OPCODE_MOV_INDIRECT:
@ -955,7 +954,6 @@ elk_backend_instruction::can_do_saturate() const
case ELK_OPCODE_DP3:
case ELK_OPCODE_DP4:
case ELK_OPCODE_DPH:
case ELK_OPCODE_DP4A:
case ELK_OPCODE_F16TO32:
case ELK_OPCODE_F32TO16:
case ELK_OPCODE_LINE: