Commit graph

214785 commits

Author SHA1 Message Date
Rhys Perry
00edddf542 ac/nir: add some tests for ac_nir_lower_mem_access_bit_sizes
These test that nothing crashes for any possible input. With print=true,
it can also be used to compare the behaviour of two different
ac_nir_lower_mem_access_bit_sizes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37995>
2025-11-13 15:23:20 +00:00
Benjamin Cheng
b4ae11ee42 ac,radeonsi/vcn,radv/video: Drop signature param
The signature is not very useful, and is unnecessary CPU overhead.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38372>
2025-11-13 14:35:58 +00:00
Mario Kleiner
490f05f82c wsi/wayland: Zero min_luminance, max_luminance HDR light levels are valid.
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CTA-861-G section 6.9.1 Static Metadata Type 1 declares that zero values
for different groups of HDR Metadata properties are allowed, including
zero nits values for max display mastering luminance, max content light
level, max frame-average light level and min display mastering luminance.

A zero value is meant to be treated by the video sink as "undefined" /
"unknown", and handled accordingly. This is common for dynamically
generated visual content.

The is_hdr_metadata_legal() function in the Vulkan/WSI/Wayland HDR backend
currently declares HDR light level metadata as invalid if the mastering
display min_luminance and max_luminance light levels are set to the legal
level of zero nits. This causes valid HDR metadata as set by the client
via vkSetHdrMetadata() to be not sent to the compositor.

Fix this by skipping checks that don't apply if min_luminance or
max_luminance are zero. If max_luminance is zero then we skip sending
of mastering display min/max luminance to Wayland, as sending a a
max_luminance <= min_luminance would trigger a protocol error. All
other valid data is still send, ie. color primaries, white-point,
content light levels.

Fixes: cb7726bb2c ("vulkan/wsi: validate HDR metadata to not cause protocol errors")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Co-authored-by: Michel Dänzer <michel@daenzer.net>
Reviewed-by: Xaver Hugl <xaver.hugl@kde.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38326>
2025-11-13 14:03:50 +00:00
Karmjit Mahil
b86ca63853 freedreno/cffdump: Emulate RMW
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38001>
2025-11-13 13:23:23 +00:00
Karmjit Mahil
265aa40a8a freedreno/decode: Add code to extent pkt processing with Lua
Setting up a new `iL` `lua_State` in which `r` is injected as
the equivalent to `rnn.init(<gpu>)` and a `priv` library allows
accessing extra functionality (not available to user provided
scripts) currently just allowing writing to registers.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38001>
2025-11-13 13:23:23 +00:00
Ashish Chauhan
8825c91dcb pvr: Make display node optional
Allow the driver to work without a display (card) node by removing
strict display controller checks.

Signed-off-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Tested-by: Icenowy Zheng <uwu@icenowy.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38082>
2025-11-13 13:07:52 +00:00
Karmjit Mahil
7f2c53200f freedreno/afuc: Fix potentially uninitialized variable
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../src/freedreno/afuc/emu-ui.c:64:11: warning: ‘p’ may be used uninitialized [-Wmaybe-uninitialized]
64 |    while (*p && isspace(*p))
   |           ^~
../src/freedreno/afuc/emu-ui.c: In function ‘emu_packet_prompt’:
../src/freedreno/afuc/emu-ui.c:459:10: note: ‘p’ was declared here
459 |    char *p;
    |          ^

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38104>
2025-11-13 11:39:54 +00:00
Karmjit Mahil
cf49571c9e ir3: fix comparison of different signedness build issue
Addresses:
../src/freedreno/ir3/ir3_shader.h: In function 'void ir3_link_add(ir3_shader_linkage*, uint8_t, uint8_t, uint8_t, uint8_t)':
../src/freedreno/ir3/ir3_shader.h:1326:16: error: comparison of integer expressions of different signedness: 'int' and 'long unsigned int' [-Werror=sign-compare]
 1326 |       assert(i < ARRAY_SIZE(l->var));

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38104>
2025-11-13 11:39:54 +00:00
Gert Wollny
79e4323cf0 r600/sfn: Don't start a new ALU-CF if LDS pipeline loads are pending
Fixes: e57643cf (r600/sfn: Add handling for R600 indirect access alias handling)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38398>
2025-11-13 11:17:51 +00:00
Lionel Landwerlin
b9266a122b anv: ensure shader printf is functional on all backends
Also ensure the printfs are read even if the device is lost or ran
into a fault.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38358>
2025-11-13 10:19:47 +00:00
Lionel Landwerlin
ef5a0def76 intel/isl: add INTEL_DEBUG=noccs-modifier to disable CCS modifiers
Some checks are pending
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To help figure out whether a CCS related corruption is tied to
modifier setup or internal driver state tracking.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38382>
2025-11-13 09:52:27 +00:00
Rhys Perry
6a5982cfe5 aco/scheduler: fix register demand check
Fixes deathloop/01f8d58bf245663b with gfx1201.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 668259ef0b ("aco/scheduler: move clauses through RAR dependencies")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38402>
2025-11-13 09:07:12 +00:00
Samuel Pitoiset
9141696d32 radv: fix gathering push constants from shaders with ESO
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Need to be 4-bytes aligned.

Fixes: aa44a5a4ae ("radv: gather push constant size from shaders for ESO")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14276
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38397>
2025-11-13 07:30:14 +00:00
Samuel Pitoiset
388875abe1 radv: bump maxRayDispatchInvocationCount to 2^30
It's the required limit by Vulkan.

Fixes dEQP-VK.ray_tracing_pipeline.limits.ray_tracing_props.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38405>
2025-11-13 07:10:39 +00:00
Qiang Yu
f07dab1899 doc: mark GL_EXT_mesh_shader as done
Some checks are pending
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:29 +00:00
Qiang Yu
ece827d53b radeonsi: enable EXT_mesh_shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:27 +00:00
Qiang Yu
3d01529316 radeonsi: si_calculate_max_simd_waves support task and mesh shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:25 +00:00
Qiang Yu
4495978932 radeonsi: handle maybe per primitive input for fragment shader
Some fragment shader may be per-primitive when mesh pipeline,
per-vertex when vertex pipeline. We sort these inputs always
after other per-vertex inputs in nir_recompute_io_bases, so
fragment shader code is same, just need to set different reg.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:24 +00:00
Qiang Yu
1733dddee9 radeonsi: add mesh shader functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:23 +00:00
Qiang Yu
4c220f9745 radeonsi: add si_emit_rasterizer_prim_state_for_mesh
To be used by mesh pipeline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:22 +00:00
Qiang Yu
4ee6553767 radeonsi: add si_update_shaders_for_mesh
To be used by mesh pipeline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:20 +00:00
Qiang Yu
8410970e8b radeonsi: add si_update_shaders_shared_by_vertex_and_mesh_pipe
Move shared part of si_update_shaders to this function,
no implementation change.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:19 +00:00
Qiang Yu
87715a1c8c radeonsi: compute culldist_mask and clipdist_mask for mesh shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:18 +00:00
Qiang Yu
355e499b52 radeonsi: si_emit_buffered_compute_sh_regs support gang cs
To be used by task shader gang cs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:17 +00:00
Qiang Yu
b713f453c6 radeonsi: lower mesh shader local id and workgroup id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:15 +00:00
Qiang Yu
2e025d66c3 radeonsi: add task shader queries support
Need to emit query start/stop/sample packets in compute
queue.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:15 +00:00
Qiang Yu
9a31151436 radeonsi: increase task wait count when emit barrier
It will be waited by task queue too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:15 +00:00
Qiang Yu
c0f6e97d6c radeonsi: implement nir_intrinsic_load_ring_mesh_scratch_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:13 +00:00
Qiang Yu
5048216b43 radeonsi: init mesh shader ngg info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:13 +00:00
Qiang Yu
432f66a7b6 radeonsi: add si_create_compute_state_for_nir
To be shared by task shader state creation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:11 +00:00
Qiang Yu
263cce11bd radeonsi: move shared_size to si_shader_variant_info
For mesh shader which know this after ac_nir_lower_ngg_mesh.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:08 +00:00
Qiang Yu
e3ab6249f2 radeonsi: export si_init_compute_preamble_state for task shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:03 +00:00
Qiang Yu
0ee4747678 radeonsi: log cs support mesh shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:02 +00:00
Qiang Yu
f1138c18ac radeonsi: implement task ring nir intrinsic lower
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:02 +00:00
Qiang Yu
e819554b2a radeonsi: add task/mesh shader context states
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:00 +00:00
Qiang Yu
cffc40051d winsys/amdgpu: support gang submit for kernel queue
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:29:58 +00:00
Qiang Yu
963ad4bb4e radeonsi: add si_emit_task_shader_pointers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:29:58 +00:00
Qiang Yu
66cd3f1b52 radeonsi: add si_upload_shader_descriptos
To be shared with gfx, mesh and compute pipeline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:29:55 +00:00
Qiang Yu
12f33b596c radeonsi: export si_setup_compute_scratch_buffer for task shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:29:54 +00:00
Qiang Yu
915d5167af radeonsi: change arg for si_cp_dma_prefetch
To be used by gang cs too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:29:52 +00:00
Yonggang Luo
8c427aae92 util: Remove unused ALIGN function to prevent future use
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The #undef ALIGN is also not needed anymore, remove it.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:41 +00:00
Yonggang Luo
ecb0ccf603 treewide: Replace calling to function ALIGN with align
This is done by grep ALIGN( to align(

docs,*.xml,blake3 is excluded

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:40 +00:00
Yonggang Luo
03a32b3fe2 radeon/drm: Replace all usage of ALIGN to align and remove ALIGN macro
As now all ALIGN usage is on 32bit integer

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
0fe6143a77 radeon/drm: use align64 for 64 bits input instead of ALIGN
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
f8eafbe627 aco: Use align64 instead ALIGN for 64 bits input
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
ee4c3e790f anv: use align/align64 instead ALIGN, as the input is size_t/uint64_t
When the input is size_t, cast the input to uint32_t, as the output is expect uint32_t not size_t

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
db767eb7e0 brw: Do not use align as variable name, as it's a function in u_math.h and will be used
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
d95d7b85ca panfrost/drm-shim: Use align_uintptr instead of ALIGN for size_t input
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
dd97f64e88 freedreno: Use align64 instead ALIGN for 64 bits input
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Yonggang Luo
974f9833cb freedreno: Do not use align as variable name, as it's a function in u_math.h and will be used
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00