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ac/nir: add some tests for ac_nir_lower_mem_access_bit_sizes
These test that nothing crashes for any possible input. With print=true, it can also be used to compare the behaviour of two different ac_nir_lower_mem_access_bit_sizes. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37995>
This commit is contained in:
Rhys Perry
Marge Bot
parent
b4ae11ee42
commit
00edddf542
2 changed files with 329 additions and 0 deletions
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@ -221,3 +221,24 @@ if with_tests and not with_platform_windows
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)
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endif
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endif
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if with_tests
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test(
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'ac_nir_tests',
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executable(
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'ac_nir_tests',
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files(
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'nir/tests/ac_nir_lower_mem_access_test.cpp',
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),
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cpp_args : [cpp_msvc_compat_args],
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gnu_symbol_visibility : 'hidden',
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link_with: [libamd_common],
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include_directories : [
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inc_amd, inc_include, inc_src, inc_amd_common
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],
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dependencies : [dep_thread, idep_gtest, idep_nir, idep_mesautil],
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),
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suite : ['amd'],
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protocol : 'gtest',
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)
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endif
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308
src/amd/common/nir/tests/ac_nir_lower_mem_access_test.cpp
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308
src/amd/common/nir/tests/ac_nir_lower_mem_access_test.cpp
Normal file
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@ -0,0 +1,308 @@
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/*
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* Copyright © 2025 Valve Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include <gtest/gtest.h>
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#include "util/string_buffer.h"
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#include "ac_gpu_info.h"
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#include "ac_nir.h"
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#include "nir_builder.h"
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struct subtest {
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amd_gfx_level gfx_level = GFX6;
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bool use_llvm = false;
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nir_intrinsic_op op = nir_num_intrinsics;
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unsigned num_components = 0;
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unsigned bit_size = 0;
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unsigned align_mul = 0;
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unsigned align_offset = 0;
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unsigned access = 0;
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};
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struct test_state {
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subtest *st = NULL;
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nir_shader *shader = NULL;
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nir_def *offset = NULL;
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unsigned num_result_intrins = 0;
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_mesa_string_buffer *result = NULL;
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};
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static bool format_offset(_mesa_string_buffer *str, nir_def *add, nir_def *src)
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{
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nir_scalar s = nir_get_scalar(add, 0);
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if (s.def == src)
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return true;
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uint64_t imm;
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if (!nir_scalar_is_alu(s) ||
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(nir_scalar_alu_op(s) != nir_op_iand && nir_scalar_alu_op(s) != nir_op_iadd))
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return false;
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bool is_and = nir_scalar_alu_op(s) == nir_op_iand;
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nir_scalar src0 = nir_scalar_chase_alu_src(s, 0);
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nir_scalar src1 = nir_scalar_chase_alu_src(s, 1);
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if (nir_scalar_is_const(src0)) {
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imm = nir_scalar_as_uint(src0);
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s = src1;
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} else if (nir_scalar_is_const(src1)) {
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imm = nir_scalar_as_uint(src1);
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s = src0;
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} else {
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return false;
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}
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if (s.comp || !format_offset(str, s.def, src))
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return false;
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if (is_and)
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_mesa_string_buffer_printf(str, "&%" PRId64, (int64_t)util_sign_extend(imm, add->bit_size));
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else
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_mesa_string_buffer_printf(str, "%+" PRId64, (int64_t)util_sign_extend(imm, add->bit_size));
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return true;
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}
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static void format_intrinsic(_mesa_string_buffer *str, nir_intrinsic_instr *intrin, nir_def *offset,
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bool print_access)
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{
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unsigned num_components, bit_size;
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if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
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num_components = intrin->def.num_components;
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bit_size = intrin->def.bit_size;
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} else {
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num_components = intrin->src[0].ssa->num_components;
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bit_size = intrin->src[0].ssa->bit_size;
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}
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unsigned align_mul = nir_intrinsic_align_mul(intrin);
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unsigned align_offset = nir_intrinsic_align_offset(intrin);
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unsigned access = 0;
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if (nir_intrinsic_has_access(intrin))
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access = nir_intrinsic_access(intrin);
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if (align_mul == bit_size / 8 && align_offset == 0)
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align_mul = 0;
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_mesa_string_buffer_printf(str, "%ux%u(", bit_size, num_components);
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nir_def *new_offset = nir_get_io_offset_src(intrin)->ssa;
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_mesa_string_buffer *offset_str = _mesa_string_buffer_create(NULL, 0);
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if (new_offset != offset && format_offset(offset_str, new_offset, offset))
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_mesa_string_buffer_printf(str, "%s,", offset_str->buf);
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else if (new_offset != offset)
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_mesa_string_buffer_append(str, "unknown,");
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_mesa_string_buffer_destroy(offset_str);
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if (align_mul && align_offset)
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_mesa_string_buffer_printf(str, "align=%u,%u,", align_mul, align_offset);
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else if (align_mul)
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_mesa_string_buffer_printf(str, "align=%u,", align_mul);
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if (print_access && (access & ACCESS_SMEM_AMD))
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_mesa_string_buffer_append(str, "smem,");
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if (str->buf[str->length - 1] == ',')
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str->buf[--str->length] = '\0';
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if (str->buf[str->length - 1] == '(')
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str->buf[--str->length] = '\0';
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else
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_mesa_string_buffer_append_char(str, ')');
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}
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void create_shader(test_state *state, nir_shader_compiler_options *options)
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{
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subtest *st = state->st;
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nir_builder _b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, NULL);
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nir_builder *b = &_b;
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state->shader = b->shader;
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unsigned offset_bit_size =
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st->op == nir_intrinsic_load_global || st->op == nir_intrinsic_store_global ? 64 : 32;
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nir_def *offset;
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if (st->access & ACCESS_SMEM_AMD)
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offset = nir_unit_test_uniform_amd(b, 1, offset_bit_size);
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else
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offset = nir_unit_test_divergent_amd(b, 1, offset_bit_size);
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state->offset = offset;
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b->shader->info.next_stage = MESA_SHADER_NONE;
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b->shader->info.internal = false;
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nir_def *def = NULL;
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nir_intrinsic_instr *instr = NULL;
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switch (st->op) {
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case nir_intrinsic_load_ssbo:
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def = nir_load_ssbo(b, st->num_components, st->bit_size, nir_imm_zero(b, 1, 32), offset);
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break;
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case nir_intrinsic_load_push_constant:
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def = nir_load_push_constant(b, st->num_components, st->bit_size, offset);
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break;
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case nir_intrinsic_load_scratch:
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def = nir_load_scratch(b, st->num_components, st->bit_size, offset);
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break;
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case nir_intrinsic_load_global:
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def = nir_load_global(b, st->num_components, st->bit_size, offset);
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break;
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case nir_intrinsic_load_shared:
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def = nir_load_shared(b, st->num_components, st->bit_size, offset);
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break;
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case nir_intrinsic_store_ssbo:
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instr = nir_store_ssbo(b, nir_undef(b, st->num_components, st->bit_size),
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nir_imm_zero(b, 1, 32), offset);
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break;
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case nir_intrinsic_store_scratch:
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instr = nir_store_scratch(b, nir_undef(b, st->num_components, st->bit_size), offset);
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break;
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case nir_intrinsic_store_global:
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instr = nir_store_global(b, nir_undef(b, st->num_components, st->bit_size), offset);
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break;
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case nir_intrinsic_store_shared:
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instr = nir_store_shared(b, nir_undef(b, st->num_components, st->bit_size), offset);
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break;
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default:
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UNREACHABLE("");
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}
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if (def) {
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nir_use(b, def);
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instr = nir_def_as_intrinsic(def);
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}
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if (st->align_mul)
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nir_intrinsic_set_align(instr, st->align_mul, st->align_offset);
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if (nir_intrinsic_has_access(instr))
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nir_intrinsic_set_access(instr, (gl_access_qualifier)st->access);
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if (st->gfx_level != GFX11) {
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if (st->gfx_level >= GFX12)
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_mesa_string_buffer_printf(state->result, "gfx%u,", st->gfx_level - GFX12 + 12);
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else if (st->gfx_level == GFX11_5)
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_mesa_string_buffer_append(state->result, "gfx11.5,");
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else if (st->gfx_level >= GFX11)
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_mesa_string_buffer_printf(state->result, "gfx%u,", st->gfx_level - GFX11 + 11);
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else if (st->gfx_level == GFX10_3)
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_mesa_string_buffer_append(state->result, "gfx10.3,");
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else if (st->gfx_level >= GFX6)
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_mesa_string_buffer_printf(state->result, "gfx%u,", st->gfx_level - GFX6 + 6);
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}
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_mesa_string_buffer_printf(state->result, "%s: ", nir_intrinsic_infos[st->op].name);
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format_intrinsic(state->result, instr, offset, true);
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_mesa_string_buffer_append(state->result, " ->");
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}
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static bool count_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin, void *state_)
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{
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test_state *state = (test_state *)state_;
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if (intrin->intrinsic == state->st->op)
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state->num_result_intrins++;
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return false;
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}
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static bool visit_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin, void *state_)
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{
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test_state *state = (test_state *)state_;
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if (intrin->intrinsic != state->st->op)
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return false;
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const char *indent = state->num_result_intrins > 4 ? "\n " : " ";
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_mesa_string_buffer_append(state->result, indent);
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format_intrinsic(state->result, intrin, state->offset, false);
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return false;
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}
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static void run_subtest(subtest *st, bool print = false)
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{
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test_state state;
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state.st = st;
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state.result = _mesa_string_buffer_create(NULL, 0);
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struct radeon_info info = {};
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info.gfx_level = st->gfx_level;
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info.has_packed_math_16bit = true;
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info.has_accelerated_dot_product = true;
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nir_shader_compiler_options options = {};
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ac_nir_set_options(&info, st->use_llvm, &options);
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create_shader(&state, &options);
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unsigned printed;
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if (print) {
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printf("%s", state.result->buf);
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/* flush in case of crash during lowering */
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fflush(stdout);
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printed = state.result->length;
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}
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ac_nir_lower_mem_access_bit_sizes(state.shader, st->gfx_level, st->use_llvm);
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nir_shader_intrinsics_pass(state.shader, &count_intrinsic, nir_metadata_all, &state);
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nir_shader_intrinsics_pass(state.shader, &visit_intrinsic, nir_metadata_all, &state);
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_mesa_string_buffer_append_char(state.result, '\n');
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ralloc_free(state.shader);
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if (print)
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printf("%s", state.result->buf + printed);
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_mesa_string_buffer_destroy(state.result);
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}
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class lower_mem_access_test : public ::testing::Test {
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protected:
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lower_mem_access_test()
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{
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glsl_type_singleton_init_or_ref();
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}
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~lower_mem_access_test()
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{
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glsl_type_singleton_decref();
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}
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void run_subtests(amd_gfx_level gfx_level, nir_intrinsic_op op, unsigned access = 0)
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{
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subtest st;
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st.gfx_level = gfx_level;
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st.use_llvm = false;
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st.op = op;
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st.access = access;
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for (st.bit_size = 8; st.bit_size <= 64; st.bit_size *= 2) {
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for (st.num_components = 0; st.num_components <= NIR_MAX_VEC_COMPONENTS;
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st.num_components++) {
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if (!nir_num_components_valid(st.num_components))
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continue;
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for (st.align_mul = 1; st.align_mul <= st.bit_size / 8; st.align_mul *= 2) {
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for (st.align_offset = 0; st.align_offset < st.align_mul; st.align_offset++) {
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run_subtest(&st, print);
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}
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}
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}
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}
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}
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/* Replace this with true to verify ac_nir_lower_mem_access_bit_sizes changes. */
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bool print = false;
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};
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TEST_F(lower_mem_access_test, all)
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{
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run_subtests(GFX11, nir_intrinsic_load_ssbo);
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run_subtests(GFX11, nir_intrinsic_load_ssbo, ACCESS_SMEM_AMD);
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run_subtests(GFX12, nir_intrinsic_load_ssbo, ACCESS_SMEM_AMD);
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run_subtests(GFX11, nir_intrinsic_load_push_constant);
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run_subtests(GFX11, nir_intrinsic_load_global);
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run_subtests(GFX11, nir_intrinsic_load_global, ACCESS_SMEM_AMD);
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run_subtests(GFX12, nir_intrinsic_load_global, ACCESS_SMEM_AMD);
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run_subtests(GFX11, nir_intrinsic_load_shared);
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run_subtests(GFX11, nir_intrinsic_load_scratch);
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run_subtests(GFX11, nir_intrinsic_store_ssbo);
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run_subtests(GFX11, nir_intrinsic_store_global);
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run_subtests(GFX11, nir_intrinsic_store_shared);
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run_subtests(GFX6, nir_intrinsic_store_shared);
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run_subtests(GFX11, nir_intrinsic_store_scratch);
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}
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