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radeonsi: add si_update_shaders_for_mesh
To be used by mesh pipeline. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
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2 changed files with 27 additions and 4 deletions
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@ -701,6 +701,7 @@ void si_set_vertex_buffer_descriptor(struct si_screen *sscreen, struct si_vertex
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uint32_t *out);
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void si_emit_buffered_compute_sh_regs(struct si_context *sctx, struct radeon_cmdbuf *cs);
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void si_emit_buffered_gfx_sh_regs_for_mesh(struct si_context *sctx);
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bool si_update_shaders_for_mesh(struct si_context *sctx, struct si_shader *old_vs, struct si_shader *new_vs);
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void si_init_draw_functions_GFX6(struct si_context *sctx);
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void si_init_draw_functions_GFX7(struct si_context *sctx);
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void si_init_draw_functions_GFX8(struct si_context *sctx);
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@ -42,7 +42,7 @@
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#define SI_VERTEX_PIPELINE_STATE_DIRTY_MASK \
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(BITFIELD_MASK(MESA_SHADER_FRAGMENT + 1) | SI_SQTT_STATE_DIRTY_BIT)
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template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_has_ngg NGG>
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template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_has_ms HAS_MS, si_has_ngg NGG>
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static bool si_update_shaders_shared_by_vertex_and_mesh_pipe(struct si_context *sctx,
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struct si_shader *old_vs,
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struct si_shader *new_vs)
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@ -137,7 +137,7 @@ static bool si_update_shaders_shared_by_vertex_and_mesh_pipe(struct si_context *
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}
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bool fixed_func_face_culling_needed = !NGG || !si_shader_culling_enabled(new_vs);
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bool fixed_func_face_culling_has_effect = (!HAS_TESS && !HAS_GS) ||
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bool fixed_func_face_culling_has_effect = (!HAS_TESS && !HAS_GS && !HAS_MS) ||
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new_vs->selector->rast_prim == MESA_PRIM_TRIANGLES;
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if (sctx->fixed_func_face_culling_needed != fixed_func_face_culling_needed ||
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@ -218,7 +218,9 @@ static bool si_update_shaders_shared_by_vertex_and_mesh_pipe(struct si_context *
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(!NGG && si_pm4_state_enabled_and_changed(sctx, vs)) || si_pm4_state_enabled_and_changed(sctx, ps)) {
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unsigned scratch_size = 0;
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if (HAS_TESS) {
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if (HAS_MS) {
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scratch_size = MAX2(scratch_size, sctx->ms_shader_state.current->config.scratch_bytes_per_wave);
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} else if (HAS_TESS) {
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if (GFX_VERSION <= GFX8) /* LS */
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scratch_size = MAX2(scratch_size, sctx->shader.vs.current->config.scratch_bytes_per_wave);
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@ -270,6 +272,26 @@ static bool si_update_shaders_shared_by_vertex_and_mesh_pipe(struct si_context *
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return true;
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}
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#if GFX_VER == 6 /* declare this function only once because it handles all chips. */
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bool si_update_shaders_for_mesh(struct si_context *sctx, struct si_shader *old_vs, struct si_shader *new_vs)
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{
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switch (sctx->screen->info.gfx_level) {
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case GFX10_3:
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return si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX10_3, TESS_OFF, GS_OFF, MS_ON, NGG_ON>(sctx, old_vs, new_vs);
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case GFX11:
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return si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX11, TESS_OFF, GS_OFF, MS_ON, NGG_ON>(sctx, old_vs, new_vs);
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case GFX11_5:
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return si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX11_5, TESS_OFF, GS_OFF, MS_ON, NGG_ON>(sctx, old_vs, new_vs);
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case GFX12:
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return si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX12, TESS_OFF, GS_OFF, MS_ON, NGG_ON>(sctx, old_vs, new_vs);
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default:
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UNREACHABLE("invalid GFX version for mesh shaders");
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}
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}
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#endif
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template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_has_ngg NGG>
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static bool si_update_shaders(struct si_context *sctx)
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{
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@ -419,7 +441,7 @@ static bool si_update_shaders(struct si_context *sctx)
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if (HAS_TESS && (is_vs_state_changed || is_tess_state_changed))
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si_update_tess_io_layout_state(sctx);
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if (!si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX_VERSION, HAS_TESS, HAS_GS, NGG>(sctx, old_vs, hw_vs))
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if (!si_update_shaders_shared_by_vertex_and_mesh_pipe<GFX_VERSION, HAS_TESS, HAS_GS, MS_OFF, NGG>(sctx, old_vs, hw_vs))
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return false;
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if (GFX_VERSION >= GFX9 && unlikely(sctx->sqtt)) {
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