Commit graph

164347 commits

Author SHA1 Message Date
Sil Vilerino
002096fcc4 d3d12: Add ASSERTED to variables only used in debug builds to fix build MSVC with C4189 errors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20340>
2022-12-15 21:06:12 +00:00
Jordan Justen
5df50292d6 intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jianxun Zhang
6e33423a6f intel/dev: Enable AUX map on MTL
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jordan Justen
f81579628a intel/aux_map: Ignore format bits when using tile-4
Based on Jianxun's ("iris: don't get format bits in AUX tables").

With gfx12.5+, the compression format is once again coming from the
surface state programming. MTL once again uses an aux-map, but it
ignores the format bits within the the aux-map metadata.

Ref: Bspec 44930: "Compression format from AUX page walk is ignored.
Instead compression format from Surface State is used."

gfx12.5+ also uses tile-4 rather than y-tiling, so if we don't see
y-tiling, we can return 0 from intel_aux_map_format_bits() for the
ignored format bits.

Rework:
 * Just return 0 if not using y-tiling as suggested by Nanley.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:43:00 -08:00
Jordan Justen
1bcce906e9 iris/resource: Check devinfo::has_local_mem before using BO_ALLOC_LMEM
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
2022-12-15 11:42:59 -08:00
José Roberto de Souza
ac9af0dcee iris: Nuke dead IRIS_CONTEXT* macros
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
2dd1b12bc6 iris: Nuke flags from iris_bufmgr that can read from devinfo
Now that devinfo is stored in iris_bufmgr we can nuke this duplicated
flags.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
1e78dd9eda iris: Only fetch intel_device_info once per bufmgr
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
José Roberto de Souza
aff85114fd iris: Store intel_device_info in iris_bufmgr
We can have multiple pipe_screen but only one iris_bufmgr per device.
So better to store intel_device_info into the shared iris_bufmgr and
save some memory.
Also in future patches iris_bufmgr will make more use of
intel_device_info.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
2022-12-15 18:55:02 +00:00
Lionel Landwerlin
b21cd1ee1b anv: fixup another dirty issue with gpu_memcpy
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20335>
2022-12-15 17:30:55 +00:00
Patrick Lerda
87f0b7d0c1 panfrost: fix memory leak related to disk cache
Direct leak of 3912 byte(s) in 2 object(s) allocated from:
    #0 0x7fbd4641b0 in __interceptor_malloc (/usr/lib64/libasan.so.6+0xa41b0)
    #1 0x7f74413518 in parse_and_validate_cache_item ../src/util/disk_cache_os.c:549
    #2 0x7f74414b84 in disk_cache_load_item ../src/util/disk_cache_os.c:599
    #3 0x7f74410364 in disk_cache_get ../src/util/disk_cache.c:551
    #4 0x7f775695ac in panfrost_disk_cache_retrieve ../src/gallium/drivers/panfrost/pan_disk_cache.c:125

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20336>
2022-12-15 17:16:40 +00:00
Rohan Garg
b1126abb38 anv: Refactor anv_pipeline to use the anv_pipeline_type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20316>
2022-12-15 16:38:18 +00:00
Konstantin Seurer
ffc8d490b7 radv/rra: Fix leaf node id order
Leaf nodes aren't stored in build order so we have to account for that
when dumping leaf node ids.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
2022-12-15 16:00:17 +00:00
Konstantin Seurer
3a8c3b813e radv/rra: Validate geometry_id
The following patch will use geometry_id so make sure that it's in
bounds.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
2022-12-15 16:00:17 +00:00
Konstantin Seurer
446c49cdf7 radv/rra: Refactor resource management during dumping
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
2022-12-15 16:00:17 +00:00
Konstantin Seurer
ab8777b384 radv/rra: Emit leaf node ids for leaf nodes instead of internal nodes
Fixes: e4283d8 ("radv/rra: Handle box16 nodes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
2022-12-15 16:00:17 +00:00
Samuel Pitoiset
5a5f3fe561 ac/sqtt: bump the maximum number of traces to 6 for GFX11
GFX11 can have more than 4 SEs. I think it would be better to allocate
an array but that's for later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20337>
2022-12-15 15:19:39 +00:00
Samuel Pitoiset
5f7955ff74 ac/rgp: add missing GFX11 bits for RGP
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20337>
2022-12-15 15:19:39 +00:00
Rhys Perry
54ae38042a ac/nir: remove num_es_threads_var
A bit count of es_accepted works for both when ngg is and isn't
dynamically enabled. Unlike the other sequence, this should only be a
single SALU instruction.

fossil-db (gfx1100, nggc):
Totals from 41388 (30.75% of 134574) affected shaders:
Instrs: 25783544 -> 25432959 (-1.36%); split: -1.36%, +0.00%
CodeSize: 127281160 -> 125878820 (-1.10%); split: -1.10%, +0.00%
Latency: 92849566 -> 92723047 (-0.14%); split: -0.14%, +0.00%
InvThroughput: 9542194 -> 9485012 (-0.60%); split: -0.60%, +0.00%
Copies: 2031074 -> 1928796 (-5.04%); split: -5.04%, +0.00%
Branches: 642407 -> 642409 (+0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20321>
2022-12-15 13:30:25 +00:00
Rhys Perry
69e55d9c1b ac/nir: fix ngg culling on gfx11
This subtraction can underflow.

If subgroup_id*wave_size is larger than num_live_vertices_in_workgroup,
num_es_threads_var should be zero.

fossil-db (gfx1100, nggc):
Totals from 41388 (30.75% of 134574) affected shaders:
Instrs: 25700772 -> 25783544 (+0.32%)
CodeSize: 126950072 -> 127281160 (+0.26%)
Latency: 92809233 -> 92849566 (+0.04%); split: -0.00%, +0.04%
InvThroughput: 9526675 -> 9542194 (+0.16%)
Copies: 2031078 -> 2031074 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20321>
2022-12-15 13:30:25 +00:00
Eric Engestrom
ba31ec0d6f vc4: replace open-coded F_DUPFD_CLOEXEC with os_dupfd_cloexec()
Just like 12 lines above.

Split out of !20180

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20313>
2022-12-15 09:53:01 +00:00
Jordan Justen
78a75e0d25 intel/common/intel_genX_state.h: Add intel_set_ps_dispatch_state()
This replaces brw_fs_get_dispatch_enables(), which was added in
b9403b1c47 ("intel: factor out dispatch PS enabling logic"), but this
function will not work well for future changes to 3DSTATE_PS.

So, instead, this moves the related code into a "genX" file which can
directly update 3DSTATE_PS for the given platform.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
2022-12-15 00:54:59 -08:00
Jordan Justen
f16e76d940 intel/common: Add intel_genX_state.h
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
2022-12-15 00:54:59 -08:00
Samuel Pitoiset
ed28705994 radv/ci: add lists for GFX1100
0 failures, call it a win (the RT ones are CTS bugs).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20315>
2022-12-15 08:34:29 +01:00
Kenneth Graunke
3440e89437 st/mesa: Enable Alpha writes when writing RGB faked as RGBA
Some GPUs are able to render more efficiently when all channels of a
color attachment are written, since whole pixels are being overwritten,
rather than hitting a read-modify-write cycle where newly written data
has to be combined with existing unmodified image data.

When faking GL_RGB as RGBA (in case RGB/RGBX isn't color renderable),
we introduce an extra channel that doesn't exist from the application
point of view.  With such a format, a color mask of 0x7 (RGB) would mean
to write all channels.  But because we've added an alpha channel behind
their back, this becomes a partial write.  We are free to write whatever
garbage we want to the alpha channel, however.  So we can enable alpha
writes, making this a more efficient full pixel write again.

This is done unconditionally as it's expected to address a problem
common to many drivers and isn't expected to be harmful, even on GPUs
where it may not help much.

Improves WebGL Aquarium performance on Alderlake GT1 by around 2.4x, in
the Chromium, using Wayland (the --enable-features=UseOzonePlatform and
--ozone-platform=wayland flags).

v2: Don't require PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND (Marek)
v3: Fix independent blending enables (Emma) - now set when needed,
    skipped when not needed, and PIPE_CAP_INDEP_BLEND_ENABLE is no
    longer a requirement.  We just optimize where we can.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7864
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v2]
Reviewed-by: Emma Anholt <emma@anholt.net> [v3]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20290>
2022-12-14 23:35:47 +00:00
Eric Engestrom
c1144c8264 docs: update calendar and link releases notes for 22.3.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20328>
2022-12-14 23:04:28 +00:00
Eric Engestrom
42de551b83 docs: add release notes for 22.3.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20328>
2022-12-14 23:04:28 +00:00
Alyssa Rosenzweig
a861501632 panfrost: Add tool to print supported texture formats
While all Panfrost-supported Mali GPUs support all the compressed texture
formats architecturally, the system integrator decides which formats will
actually be wired up in the production system-on-chip. In the past there may
have been legal considerations, I'm neither a lawyer nor a system integrator so
couldn't say.

It's useful for users to know which compressed texture formats are supported by
their hardware, to understand its performance characteristics (and perhaps to
buy systems that support their needs, especially if they need BCn formats which
are omitted in many Mali implementations).

To help with that, this commit adds a small standalone tool that prints which
formats are supported. It is tested so far on Mali-T860 and Mali-G57.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20086>
2022-12-14 22:48:47 +00:00
Emma Anholt
dafbdd8a35 ci/nouveau: Add a bunch of the top hits of gk20a flakes.
A bit of categorization in the process.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20326>
2022-12-14 21:41:51 +00:00
Emma Anholt
3890df3382 ci/nouveau: Sort some uncategorized gk20a flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20326>
2022-12-14 21:41:51 +00:00
Kenneth Graunke
0521027182 nir: Allow more than just ALU instructions in 'weak' GVN
This removes the ALU-only restriction on the "weak" GVN introduced by
the previous commit.  This makes it slightly more aggressive, allowing
it to coalesce things like UBO loads (still within sister then/else
blocks).  This also can have surprisingly large cascading effects.

I was concerned that this might increase register pressure, but
shader-db and fossil-db show effectively no change in spills/fills,
so it seems to be fine.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19823>
2022-12-14 20:56:55 +00:00
Kenneth Graunke
d5d03a7273 nir: Perform 'weak' global value numbering in all GCM passes
Full global value numbering (GVN) can be pretty aggressive, moving
values far away from their original locations, even out of loops,
and can extend their live ranges a lot.  So we've left it disabled.

This patch introduces a weaker form of GVN: we only allow coalescing
identical values when they appear on either side of the same if/else
construct.  For now, we also only allow ALU instructions.

This allows nir_opt_gcm to clean up identical instructions appearing
on both sides of if/then/else control flow.  But it avoids aggressively
combining every other occurrence of a value in the program.

This can still have surprisingly large cascading effects, as simple
constructs are cleaned up, leading to more opportunities to do the
same clean up, up a chain of nested ifs.  It also enables greater use
of the select peephole as ifs are cleaned up.

shader-db and fossil-db results show a reduction in spills/fills on
Icelake, so it doesn't seem to be hurting register pressure.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19823>
2022-12-14 20:56:55 +00:00
Paulo Zanoni
e930bff19e anv: remove anv_reloc_list->array_length
This is another field that, after the recent commits, became unused.
It's either zero-initialized (by the memset) or copy-initialized
(which means it's also zero). And it never even gets used anywhere
anyway, so even if the value was non-zero it wouldn't matter.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
1358622878 anv: remove anv_reloc_list->reloc_bos
As a consequence of the last two commits, reloc_bos is always NULL and
never used anywhere, so remove it.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
f1c4c646b8 anv: remove anv_reloc_list_grow()
The last commit made it clear that anv_reloc_list_grow() only ever
gets called with zero as num_additional_relocs, which means it will
always immediately return VK_SUCCESS without doing anything. That
means we can remove it.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
4168d3ef30 anv: remove anv_reloc_list->num_relocs
There are only a few places in the code where num_relocs gets set:

  - During anv_reloc_list_init() where it gets memset() to 0.
  - At anv_reloc_list_init_clone() where it gets set with the value of
    another anv_reloc_list->num_relocs.
  - During anv_reloc_list_clear(), where it gets set to 0.
  - During anv_reloc_list_append(), where it gets added with the value
    of another anv_reloc_list->num_relocs.

As you can see, either we explicitly set the value to 0 or we copy the
value that's present in another anv_reloc_list, which should be 0. The
one place where we used to increment num_relocs was in
anv_reloc_list_add(), but that was deleted by:

  7b7381e8d7 ("anv: Delete anv_reloc_list_add()")

So in this commit we delete the num_relocs field from struct
anv_reloc_list and we also delete some lines where, if the value is 0,
nothing will happen.

There's more we could be deleting here, but I wanted this commit to be
minimal so it's very clear that num_relocs can't be non-zero. We were
having some speculation that anv_reloc_list may still be important for
actually adding BOs to the batch and building the validation list, so
let's go slowly with the removal to make everything more easily
reviewable.

The one possibility I could be missing here is another situation like
the memset() we have at anv_reloc_list_init() or some other crazy
indirect overwrite, but as far as I have checked, that is not the
case.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
4b1c4925e7 anv: remove anv_execbuf->surface_states_relocs
Now that we removed relocations, this is not being used anywhere.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Jianxun Zhang
c14857e915 intel/common: clean up AUX macros
The hardcoded is either replaced with new interfaces or relocated
to C file if it is private.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20259>
2022-12-14 18:11:13 +00:00
Jianxun Zhang
9ff471fdc6 intel/vulkan: replace AUX macros with interfaces
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20259>
2022-12-14 18:11:13 +00:00
Jianxun Zhang
78a4b6deed intel/isl: Support 1MB alignment for AUX mapping
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20259>
2022-12-14 18:11:13 +00:00
Jianxun Zhang
9698eee50d intel/common: Support 1MB granularity AUX mapping format (Bspec 44930)
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20259>
2022-12-14 18:11:13 +00:00
Emma Anholt
49c6e30611 ci/bare-metal: Avoid a bug in armhf stripping causing tempfiles in artifacts.
We're failing to strip, so at least try not to leave a million tempfiles
around.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20302>
2022-12-14 17:09:07 +00:00
Emma Anholt
dace7d780d ci/baremetal: Clean the directory we unpack artifacts into.
gitlab-runner reuses containers, and since we don't pull git, the working
directory doesn't get cleaned automatically.  You don't want to have stale
files from previous builds, particularly if someone's testing changes of
build options that might disable a driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20302>
2022-12-14 17:09:07 +00:00
Connor Abbott
046c75e95c tu: Use start offset for storage buffers
This lets us expose a minStorageBufferOffsetAlignment of 4 which is what
vkd3d-proton expects.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20105>
2022-12-14 16:19:47 +00:00
Connor Abbott
316ed8f965 tu: Expose *TexelBufferOffsetSingleTexelAlignment
This exactly matches what the HW can do.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20105>
2022-12-14 16:19:47 +00:00
Connor Abbott
4d2aa9a9f7 freedreno/fdl: Support texel-aligned iova for buffer views
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20105>
2022-12-14 16:19:47 +00:00
Connor Abbott
3ca90405e8 freedreno/a6xx: Document buffer-specific tex const fields
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20105>
2022-12-14 16:19:47 +00:00
Connor Abbott
f94bd1d723 freedreno: Document various preemption-related registers/packets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20229>
2022-12-14 15:52:22 +00:00
Hans-Kristian Arntzen
34010a50d4 wsi/x11: Rename the present progress objects.
The lock and condition variable isn't just for present_id anymore,
it's also for normal forward progress.

Adds more detailed comments what the variables are supposed to
accomplish.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19990>
2022-12-14 14:20:54 +00:00
Hans-Kristian Arntzen
9e55766f63 wsi/x11: Fix possible deadlock with wait_ready.
With the introduction of locks around the XCB polling mechanism,
a possible deadlock was introduced.

If all 5 images were rapidly acquired and presented before the
FIFO thread had the chance to submit a present,
we would deadlock.

Before the lock however, it was still buggy since the two threads would
race to poll events and update internal state.

The fix is to just ensure that there are pending presentation requests
in flight, so that forward progress is guaranteed before we take the
poll lock.

Also, use a timedlock for acquire next image.

Similar as WaitForPresentKHR.
Also need to make the busy flag atomic to actually allow acquire thread
and present threads to access the busy flag.
Take advantage of busy flag being atomic so that we can gracefully handle
timeout == 0 scenarios where there actually are images available.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: 8fc7927787 ("wsi/x11: Implement VK_KHR_present_wait on X11.)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19990>
2022-12-14 14:20:54 +00:00